Timer (Timer/Counter)

group group_hal_impl_timer

Default Frequency Range

If no cyhal_clock_t is passed to cyhal_timer_init, a default clock will be allocated. This clock will be a Peripheral Clock (default frequency 100 Mhz) with a 16 bit Peripheral Clock divider. Because of this the frequency range that is supported by cyhal_timer_set_frequency is: 1526 hz - 100 Mhz

Interconnect

In PSoC Timer channels can configure multiple input and output triggers simultaneously. 1 or more input triggers can be configured to initiate different Timer actions (e.g start, stop, reload, etc) with configurable edge detection on that incoming signal. Output triggers are based on certain events (e.g overflow, cc_match, etc). Note: The terminal_count output trigger is only available for TCPWMv2.