cy_sar_8h

Header file for the SAR driver.

Version

2.0.1

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0
Copyright

Copyright 2017-2021 Cypress Semiconductor Corporation SPDX-License-Identifier: Apache-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

Defines

CY_SAR_DRV_VERSION_MAJOR

Driver major version.

CY_SAR_DRV_VERSION_MINOR

Driver minor version.

CY_SAR_ID

SAR driver identifier.

CY_SAR_SEQ_NUM_CHANNELS

Number of sequencer channels.

CY_SAR_NUM_CHANNELS

Number of all channels including the injection chennel.

CY_SAR_INJ_CHANNEL

Injection channel index.

CY_SAR_CHANNELS_MASK

Channels mask.

CY_SAR_INJ_CHAN_MASK

Injection channel mask.

CY_SAR_INTR_EOS

Interrupt masks.

Enable end of scan (EOS) interrupt

CY_SAR_INTR_OVERFLOW

Enable overflow interrupt.

CY_SAR_INTR_FW_COLLISION

Enable firmware collision interrupt.

CY_SAR_INTR_INJ_EOC

Enable injection channel end of conversion (EOC) interrupt.

CY_SAR_INTR_INJ_SATURATE

Enable injection channel saturation interrupt.

CY_SAR_INTR_INJ_RANGE

Enable injection channel range detection interrupt.

CY_SAR_INTR_INJ_COLLISION

Enable injection channel firmware collision interrupt.

CY_SAR_INTR_FIFO_LEVEL

Enable FIFO level interrupt.

CY_SAR_INTR_FIFO_OVERFLOW

Enable FIFO overflow interrupt.

CY_SAR_INTR_FIFO_UNDERFLOW

Enable FIFO underflow interrupt.

CY_SAR_INTR

Combined interrupt mask.

CY_SAR_INTR_FIFO

Combined interrupt mask for FIFO.

CY_SAR_SAR0

SAR 0 instance.

CY_SAR_SAR1

SAR 1 instance.

CY_SAR_SAR2

SAR 2 instance.

CY_SAR_SAR3

SAR 3 instance.

CY_SAR_INSTANCE_MASK(base)

Convert SAR base to instance mask.

Could be used instead of SAR 0 - SAR 3 instance masks

CY_SAR_TIMER

Trigger source is Timer.

Used only for simultTrigSource configuration in cy_stc_sar_common_config_t

Cy_SAR_Sleep

This macro is for backward compatibility macro for driver v1.10 and before, the preferred API is Cy_SAR_DeepSleep.

Enums

enum cy_en_sar_status_t

cy_en_sar_status_t: The SAR status/error code definitions.

Values:

enumerator CY_SAR_SUCCESS

Success.

enumerator CY_SAR_BAD_PARAM

Invalid input parameters.

enumerator CY_SAR_TIMEOUT

A timeout occurred.

enumerator CY_SAR_CONVERSION_NOT_COMPLETE

SAR conversion is not complete.

enum cy_en_sar_start_convert_sel_t

cy_en_sar_start_convert_sel_t: Definitions for starting a conversion used in Cy_SAR_StartConvert.

Values:

enumerator CY_SAR_START_CONVERT_SINGLE_SHOT

Start a single scan (one shot) from firmware.

enumerator CY_SAR_START_CONVERT_CONTINUOUS

Continuously scan enabled channels and ignores all triggers, firmware or hardware.

enum cy_en_sar_return_mode_t

cy_en_sar_return_mode_t: Definitions for the return mode used in Cy_SAR_IsEndConversion.

Values:

enumerator CY_SAR_RETURN_STATUS

Immediately returns the conversion status.

enumerator CY_SAR_WAIT_FOR_RESULT

Does not return a result until the conversion of all sequential channels is complete.

This mode is blocking.

enumerator CY_SAR_RETURN_STATUS_INJ

Immediately returns the conversion status of the injection channel.

enumerator CY_SAR_WAIT_FOR_RESULT_INJ

Does not return a result until the conversion of injection channels is complete.

This mode is blocking.

enum cy_en_sar_switch_state_t

cy_en_sar_switch_state_t: Switch state definitions.

Values:

enumerator CY_SAR_SWITCH_OPEN

Open the switch.

enumerator CY_SAR_SWITCH_CLOSE

Close the switch.

enum cy_en_sar_switch_sar_seq_ctrl_t

cy_en_sar_switch_sar_seq_ctrl_t: Definitions for sequencer control of switches.

Values:

enumerator CY_SAR_SWITCH_SEQ_CTRL_DISABLE

Disable sequencer control of switch.

enumerator CY_SAR_SWITCH_SEQ_CTRL_ENABLE

Enable sequencer control of switch.

enum cy_en_sar_switch_register_sel_t

cy_en_sar_switch_register_sel_t: Switch register selection for Cy_SAR_SetAnalogSwitch and Cy_SAR_GetAnalogSwitch.

Values:

enumerator CY_SAR_MUX_SWITCH0

SARMUX switch control register.

enum cy_en_sar_ctrl_pwr_ctrl_vref_t

cy_en_sar_ctrl_pwr_ctrl_vref_t: Reference voltage buffer power mode definitions.

Values:

enumerator CY_SAR_VREF_PWR_100

Full power (100%)

enumerator CY_SAR_VREF_PWR_80

80% power

enumerator CY_SAR_VREF_PWR_60

60% power

enumerator CY_SAR_VREF_PWR_50

50% power

enumerator CY_SAR_VREF_PWR_40

40% power

enumerator CY_SAR_VREF_PWR_30

30% power

enumerator CY_SAR_VREF_PWR_20

20% power

enumerator CY_SAR_VREF_PWR_10

10% power

enum cy_en_sar_ctrl_vref_sel_t

cy_en_sar_ctrl_vref_sel_t: Reference voltage selection definitions.

Values:

enumerator CY_SAR_VREF_SEL_BGR

System wide bandgap from AREF (Vref buffer on)

enumerator CY_SAR_VREF_SEL_EXT

External Vref direct from a pin.

enumerator CY_SAR_VREF_SEL_VDDA_DIV_2

Vdda/2 (Vref buffer on)

enumerator CY_SAR_VREF_SEL_VDDA

Vdda.

enum cy_en_sar_ctrl_bypass_cap_t

cy_en_sar_ctrl_bypass_cap_t: Vref bypass cap enable.

When enabled, a bypass capacitor should be connected to the dedicated Vref pin of the device. Refer to the device datasheet for the minimum bypass capacitor value to use.

Values:

enumerator CY_SAR_BYPASS_CAP_DISABLE

Disable Vref bypass cap.

enumerator CY_SAR_BYPASS_CAP_ENABLE

Enable Vref bypass cap.

enum cy_en_sar_ctrl_neg_sel_t

cy_en_sar_ctrl_neg_sel_t: Negative terminal (Vminus) selection definitions for single-ended channels.

The Vminus input for single ended channels can be connected to Vref, VSSA, or routed out to an external pin. The options for routing to a pin are through Pin 1, Pin 3, Pin 5, or Pin 7 of the SARMUX dedicated port or an acore wire in AROUTE, if available on the device.

CY_SAR_NEG_SEL_VSSA_KELVIN comes straight from a Vssa pad without any shared branches so as to keep quiet and avoid voltage drops.

Values:

enumerator CY_SAR_NEG_SEL_VSSA_KELVIN

Connect Vminus to VSSA_KELVIN.

enumerator CY_SAR_NEG_SEL_P1

Connect Vminus to Pin 1 of SARMUX dedicated port.

enumerator CY_SAR_NEG_SEL_P3

Connect Vminus to Pin 3 of SARMUX dedicated port.

enumerator CY_SAR_NEG_SEL_P5

Connect Vminus to Pin 5 of SARMUX dedicated port.

enumerator CY_SAR_NEG_SEL_P7

Connect Vminus to Pin 6 of SARMUX dedicated port.

enumerator CY_SAR_NEG_SEL_ACORE

Connect Vminus to an ACORE in AROUTE.

enumerator CY_SAR_NEG_SEL_VREF

Connect Vminus to VREF input of SARADC.

enum cy_en_sar_ctrl_hw_ctrl_negvref_t

cy_en_sar_ctrl_hw_ctrl_negvref_t: Enable hardware control of the switch between Vref and the Vminus input.

Values:

enumerator CY_SAR_CTRL_NEGVREF_FW_ONLY

Only firmware control of the switch.

enumerator CY_SAR_CTRL_NEGVREF_HW

Enable hardware control of the switch.

enum cy_en_sar_ctrl_comp_delay_t

cy_en_sar_ctrl_comp_delay_t: Configure the comparator latch delay.

Values:

enumerator CY_SAR_CTRL_COMP_DLY_2P5

2.5 ns delay, use for SAR conversion rate up to 2.5 Msps

enumerator CY_SAR_CTRL_COMP_DLY_4

4 ns delay, use for SAR conversion rate up to 2.0 Msps

enumerator CY_SAR_CTRL_COMP_DLY_10

10 ns delay, use for SAR conversion rate up to 1.5 Msps

enumerator CY_SAR_CTRL_COMP_DLY_12

12 ns delay, use for SAR conversion rate up to 1 Msps

enum cy_en_sar_ctrl_comp_pwr_t

cy_en_sar_ctrl_comp_pwr_t: Configure the comparator power mode.

Values:

enumerator CY_SAR_COMP_PWR_100

100% power, use this for > 2 Msps

enumerator CY_SAR_COMP_PWR_80

80% power, use this for 1.5 - 2 Msps

enumerator CY_SAR_COMP_PWR_60

60% power, use this for 1.0 - 1.5 Msps

enumerator CY_SAR_COMP_PWR_50

50% power, use this for 500 ksps - 1 Msps

enumerator CY_SAR_COMP_PWR_40

40% power, use this for 250 - 500 ksps

enumerator CY_SAR_COMP_PWR_30

30% power, use this for 100 - 250 ksps

enumerator CY_SAR_COMP_PWR_20

20% power, use this for TDB sps

enumerator CY_SAR_COMP_PWR_10

10% power, use this for < 100 ksps

enum cy_en_sar_ctrl_sarmux_deep_sleep_t

cy_en_sar_ctrl_sarmux_deep_sleep_t: Enable or disable the SARMUX during Deep Sleep power mode.

Values:

enumerator CY_SAR_DEEPSLEEP_SARMUX_OFF

Disable SARMUX operation during Deep Sleep.

enumerator CY_SAR_DEEPSLEEP_SARMUX_ON

Enable SARMUX operation during Deep Sleep.

enum cy_en_sar_ctrl_sarseq_routing_switches_t

cy_en_sar_ctrl_sarseq_routing_switches_t: Enable or disable the SARSEQ control of routing switches.

Values:

enumerator CY_SAR_SARSEQ_SWITCH_ENABLE

Enable the SARSEQ to change the routing switches defined in the channel configurations.

enumerator CY_SAR_SARSEQ_SWITCH_DISABLE

Disable the SARSEQ.

It is up to the firmware to set the routing switches

enum cy_en_sar_sample_ctrl_result_align_t

cy_en_sar_sample_ctrl_result_align_t: Configure result alignment, either left or right aligned.

note

Averaging always uses right alignment. If the CY_SAR_LEFT_ALIGN is selected with averaging enabled, it is ignored.

note

The voltage conversion functions (Cy_SAR_CountsTo_Volts, Cy_SAR_CountsTo_mVolts, Cy_SAR_CountsTo_uVolts) are only valid for right alignment.

Values:

enumerator CY_SAR_RIGHT_ALIGN

Right align result data to bits [11:0] with sign extension to 16 bits if channel is signed.

enumerator CY_SAR_LEFT_ALIGN

Left align result data to bits [15:4].

enum cy_en_sar_sample_ctrl_single_ended_format_t

cy_en_sar_sample_ctrl_single_ended_format_t: Configure format, signed or unsigned, of single-ended channels.

Values:

enumerator CY_SAR_SINGLE_ENDED_UNSIGNED

Result data for single-ended channels is unsigned.

enumerator CY_SAR_SINGLE_ENDED_SIGNED

Result data for single-ended channels is signed.

enum cy_en_sar_sample_ctrl_differential_format_t

cy_en_sar_sample_ctrl_differential_format_t: Configure format, signed or unsigned, of differential channels.

Values:

enumerator CY_SAR_DIFFERENTIAL_UNSIGNED

Result data for differential channels is unsigned.

enumerator CY_SAR_DIFFERENTIAL_SIGNED

Result data for differential channels is signed.

enum cy_en_sar_sample_ctrl_avg_cnt_t

cy_en_sar_sample_ctrl_avg_cnt_t: Configure number of samples for averaging.

This applies only to channels with averaging enabled.

Values:

enumerator CY_SAR_AVG_CNT_2

Set samples averaged to 2.

enumerator CY_SAR_AVG_CNT_4

Set samples averaged to 4.

enumerator CY_SAR_AVG_CNT_8

Set samples averaged to 8.

enumerator CY_SAR_AVG_CNT_16

Set samples averaged to 16.

enumerator CY_SAR_AVG_CNT_32

Set samples averaged to 32.

enumerator CY_SAR_AVG_CNT_64

Set samples averaged to 64.

enumerator CY_SAR_AVG_CNT_128

Set samples averaged to 128.

enumerator CY_SAR_AVG_CNT_256

Set samples averaged to 256.

enum cy_en_sar_sample_ctrl_avg_mode_t

cy_en_sar_sample_ctrl_avg_mode_t: Configure the averaging mode.

  • Sequential accumulate and dump: a channel will be sampled back to back. The result is added to a running sum in a 20-bit register. At the end of the scan, the accumulated value is shifted right to fit into 16 bits and stored into the CHAN_RESULT register.

  • Sequential fixed: a channel will be sampled back to back. The result is added to a running sum in a 20-bit register. At the end of the scan, the accumulated value is shifted right to fit into 12 bits and stored into the CHAN_RESULT register.

  • Interleaved: a channel will be sampled once per scan. The result is added to a running sum in a 16-bit register. In the scan where the final averaging count is reached, the accumulated value is shifted right to fit into 12 bits and stored into the CHAN_RESULT register. In all other scans, the CHAN_RESULT will have an invalid result. In interleaved mode, make sure that the averaging count is low enough to ensure that the intermediate value does not exceed 16 bits, that is averaging count is 16 or less. Otherwise, the MSBs will be lost. In the special case that averaging is enabled for all enabled channels and interleaved mode is used, the interrupt frequency will be reduced by a factor of the number of samples averaged.

Values:

enumerator CY_SAR_AVG_MODE_SEQUENTIAL_ACCUM

Set mode to sequential accumulate and dump.

enumerator CY_SAR_AVG_MODE_SEQUENTIAL_FIXED

Set mode to sequential 12-bit fixed.

enumerator CY_SAR_AVG_MODE_INTERLEAVED

Set mode to interleaved.

Number of samples per scan must be 16 or less.

enum cy_en_sar_sample_ctrl_trigger_mode_t

cy_en_sar_sample_ctrl_trigger_mode_t: Configure the trigger mode.

Firmware triggering is always enabled and can be single shot or continuous. Additionally, hardware triggering can be enabled with the option to be edge or level sensitive.

Values:

enumerator CY_SAR_TRIGGER_MODE_FW_ONLY

Firmware trigger only, disable hardware trigger.

enumerator CY_SAR_TRIGGER_MODE_FW_AND_HWEDGE

Enable edge sensitive hardware trigger.

Each rising edge will trigger a single scan.

enumerator CY_SAR_TRIGGER_MODE_FW_AND_HWLEVEL

Enable level sensitive hardware trigger.

The SAR will continuously scan while the trigger signal is high.

enum cy_en_sar_sample_time_shift_t

cy_en_sar_sample_time_shift_t: Configure the sample time by using these shifts.

Values:

enumerator CY_SAR_SAMPLE_TIME0_SHIFT

Shift for sample time 0.

enumerator CY_SAR_SAMPLE_TIME1_SHIFT

Shift for sample time 1.

enumerator CY_SAR_SAMPLE_TIME2_SHIFT

Shift for sample time 2.

enumerator CY_SAR_SAMPLE_TIME3_SHIFT

Shift for sample time 3.

enum cy_en_sar_range_thres_shift_t

cy_en_sar_range_thres_shift_t: Configure the lower and upper thresholds for range detection.

The SARSEQ supports range detection to allow for automatic detection of sample values compared to two programmable thresholds without CPU involvement. Range detection is defined by two global thresholds and a condition. The RANGE_LOW value defines the lower threshold and RANGE_HIGH defines the upper threshold of the range.

Range detect is done after averaging, alignment, and sign extension (if applicable). In other words, the thresholds values must have the same data format as the result data. Range detection is always done for all channels scanned. By making RANGE_INTR_MASK=0, the firmware can choose to ignore the range detect interrupt for any channel.

Values:

enumerator CY_SAR_RANGE_LOW_SHIFT

Shift for setting lower limit of range detection.

enumerator CY_SAR_RANGE_HIGH_SHIFT

Shift for setting upper limit of range detection.

enum cy_en_sar_range_detect_condition_t

cy_en_sar_range_detect_condition_t: Configure the condition (below, inside, above, or outside) of the range detection interrupt.

Values:

enumerator CY_SAR_RANGE_COND_BELOW

Range interrupt detected when result < RANGE_LOW.

enumerator CY_SAR_RANGE_COND_INSIDE

Range interrupt detected when RANGE_LOW <= result < RANGE_HIGH.

enumerator CY_SAR_RANGE_COND_ABOVE

Range interrupt detected when RANGE_HIGH <= result.

enumerator CY_SAR_RANGE_COND_OUTSIDE

Range interrupt detected when result < RANGE_LOW || RANGE_HIGH <= result.

enum cy_en_sar_chan_config_input_mode_t

cy_en_sar_chan_config_input_mode_t: Configure the input mode of the channel.

  • Single ended channel: the cy_en_sar_ctrl_neg_sel_t selection in the uint32_t ctrl register determines what drives the Vminus pin

  • Differential paired: Vplus and Vminus are a pair. Bit 0 of POS_PIN_ADDR is ignored and considered to be 0. In other words, POS_PIN_ADDR points to the even pin of a pin pair. The even pin is connected to Vplus and the odd pin is connected to Vminus. POS_PORT_ADDR is used to identify the port that contains the pins.

  • Differential unpaired: The NEG_PIN_ADDR and NEG_PORT_ADDR determine what drives the Vminus pin. This is a variation of differential mode with no even-odd pair limitation

Values:

enumerator CY_SAR_CHAN_SINGLE_ENDED

Single ended channel.

enumerator CY_SAR_CHAN_DIFFERENTIAL_PAIRED

Differential with even-odd pair limitation.

enumerator CY_SAR_CHAN_DIFFERENTIAL_UNPAIRED

Differential with no even-odd pair limitation.

enum cy_en_sar_chan_config_pos_pin_addr_t

cy_en_sar_chan_config_pos_pin_addr_t: Configure address of the pin connected to the Vplus terminal of the SARADC.

Values:

enumerator CY_SAR_CHAN_POS_PIN_ADDR_0

Pin 0 on port specified in cy_en_sar_chan_config_pos_port_addr_t.

enumerator CY_SAR_CHAN_POS_PIN_ADDR_1

Pin 1 on port specified in cy_en_sar_chan_config_pos_port_addr_t.

enumerator CY_SAR_CHAN_POS_PIN_ADDR_2

Pin 2 on port specified in cy_en_sar_chan_config_pos_port_addr_t.

enumerator CY_SAR_CHAN_POS_PIN_ADDR_3

Pin 3 on port specified in cy_en_sar_chan_config_pos_port_addr_t.

enumerator CY_SAR_CHAN_POS_PIN_ADDR_4

Pin 4 on port specified in cy_en_sar_chan_config_pos_port_addr_t.

enumerator CY_SAR_CHAN_POS_PIN_ADDR_5

Pin 5 on port specified in cy_en_sar_chan_config_pos_port_addr_t.

enumerator CY_SAR_CHAN_POS_PIN_ADDR_6

Pin 6 on port specified in cy_en_sar_chan_config_pos_port_addr_t.

enumerator CY_SAR_CHAN_POS_PIN_ADDR_7

Pin 7 on port specified in cy_en_sar_chan_config_pos_port_addr_t.

enum cy_en_sar_chan_config_pos_port_addr_t

cy_en_sar_chan_config_pos_port_addr_t: Configure address of the port that contains the pin connected to the Vplus terminal of the SARADC.

  • CY_SAR_POS_PORT_ADDR_SARMUX is for the dedicated SARMUX port (8 pins)

  • Port 1 through 4 are respectively the pins of CTB0, CTB1, CTB2, and CTB3 (if present)

  • Port 7, 5, and 6 (VPORT0/1/2) are the groups of internal signals that can be selected in the SARMUX or AROUTE (if present).

See the SARMUX and SARSEQ section for more guidance.

Values:

enumerator CY_SAR_POS_PORT_ADDR_SARMUX

Dedicated SARMUX port with 8 possible pins.

enumerator CY_SAR_POS_PORT_ADDR_CTB0

Outputs from CTB0, if present.

enumerator CY_SAR_POS_PORT_ADDR_CTB1

Outputs from CTB1, if present.

enumerator CY_SAR_POS_PORT_ADDR_CTB2

Outputs from CTB2, if present.

enumerator CY_SAR_POS_PORT_ADDR_CTB3

Outputs from CTB3, if present.

enumerator CY_SAR_POS_PORT_ADDR_AROUTE_VIRT2

AROUTE virtual port (VPORT2), if present.

enumerator CY_SAR_POS_PORT_ADDR_AROUTE_VIRT1

AROUTE virtual port (VPORT1), if present.

enumerator CY_SAR_POS_PORT_ADDR_SARMUX_VIRT

SARMUX virtual port for DieTemp and AMUXBUSA/B.

enum cy_en_sar_chan_config_avg_en_t

cy_en_sar_chan_config_avg_en_t: Enable or disable averaging for the channel.

Values:

enumerator CY_SAR_CHAN_AVG_DISABLE

Disable averaging for the channel.

enumerator CY_SAR_CHAN_AVG_ENABLE

Enable averaging for the channel.

enum cy_en_sar_chan_config_sample_time_t

cy_en_sar_chan_config_sample_time_t: Select which sample time to use for the channel.

There are four global samples times available set by uint32_t sampleTime01 and uint32_t sampleTime23.

Values:

enumerator CY_SAR_CHAN_SAMPLE_TIME_0

Use sample time 0 for the channel.

enumerator CY_SAR_CHAN_SAMPLE_TIME_1

Use sample time 1 for the channel.

enumerator CY_SAR_CHAN_SAMPLE_TIME_2

Use sample time 2 for the channel.

enumerator CY_SAR_CHAN_SAMPLE_TIME_3

Use sample time 3 for the channel.

enum cy_en_sar_chan_config_neg_pin_addr_t

cy_en_sar_chan_config_neg_pin_addr_t: Configure address of the pin connected to the Vminus terminal of the SARADC.

Values:

enumerator CY_SAR_CHAN_NEG_PIN_ADDR_0

Pin 0 on port specified in cy_en_sar_chan_config_neg_port_addr_t.

enumerator CY_SAR_CHAN_NEG_PIN_ADDR_1

Pin 1 on port specified in cy_en_sar_chan_config_neg_port_addr_t.

enumerator CY_SAR_CHAN_NEG_PIN_ADDR_2

Pin 2 on port specified in cy_en_sar_chan_config_neg_port_addr_t.

enumerator CY_SAR_CHAN_NEG_PIN_ADDR_3

Pin 3 on port specified in cy_en_sar_chan_config_neg_port_addr_t.

enumerator CY_SAR_CHAN_NEG_PIN_ADDR_4

Pin 4 on port specified in cy_en_sar_chan_config_neg_port_addr_t.

enumerator CY_SAR_CHAN_NEG_PIN_ADDR_5

Pin 5 on port specified in cy_en_sar_chan_config_neg_port_addr_t.

enumerator CY_SAR_CHAN_NEG_PIN_ADDR_6

Pin 6 on port specified in cy_en_sar_chan_config_neg_port_addr_t.

enumerator CY_SAR_CHAN_NEG_PIN_ADDR_7

Pin 7 on port specified in cy_en_sar_chan_config_neg_port_addr_t.

enum cy_en_sar_chan_config_neg_port_addr_t

cy_en_sar_chan_config_neg_port_addr_t: Configure address of the port that contains the pin connected to the Vminus terminal of the SARADC.

  • Port 0 is 8 pins of the SARMUX

  • Port 7, 5, and 6 (VPORT0/1/2) are the groups of internal signals that can be selected in the SARMUX or AROUTE (if present).

Values:

enumerator CY_SAR_NEG_PORT_ADDR_SARMUX

Dedicated SARMUX port with 8 possible pins.

enumerator CY_SAR_NEG_PORT_ADDR_AROUTE_VIRT2

AROUTE virtual port (VPORT2), if present.

enumerator CY_SAR_NEG_PORT_ADDR_AROUTE_VIRT1

AROUTE virtual port (VPORT1), if present.

enumerator CY_SAR_NEG_PORT_ADDR_SARMUX_VIRT

SARMUX virtual port for AMUXBUSA/B.

enum cy_en_sar_inj_chan_config_port_addr_t

cy_en_sar_inj_chan_config_port_addr_t: Configure address of the port that contains the pin connected to the Vplus terminal of the injection channel.

  • CY_SAR_INJ_PORT_ADDR_SARMUX is for the dedicated SARMUX port (8 pins)

  • Ports 1 through 4 are respectively the pins of CTB0, CTB1, CTB2, and CTB3 (if present)

  • Ports 7 and 6 are the groups of internal signals that can be selected in the SARMUX or AROUTE (if present).

See the SARMUX and SARSEQ section for more guidance.

Values:

enumerator CY_SAR_INJ_PORT_ADDR_SARMUX

Dedicated SARMUX port with 8 possible pins.

enumerator CY_SAR_INJ_PORT_ADDR_CTB0

Outputs from CTB0, if present.

enumerator CY_SAR_INJ_PORT_ADDR_CTB1

Outputs from CTB1, if present.

enumerator CY_SAR_INJ_PORT_ADDR_CTB2

Outputs from CTB2, if present.

enumerator CY_SAR_INJ_PORT_ADDR_CTB3

Outputs from CTB3, if present.

enumerator CY_SAR_INJ_PORT_ADDR_AROUTE_VIRT

AROUTE virtual port (VPORT), if present.

enumerator CY_SAR_INJ_PORT_ADDR_SARMUX_VIRT

SARMUX virtual port for DieTemp and AMUXBUSA/B.

enum cy_en_sar_mux_switch_fw_ctrl_t

cy_en_sar_mux_switch_fw_ctrl_t: Firmware control for the SARMUX switches to connect analog signals to the SAR ADC.

To close multiple switches, “OR” the enum values together.

See the SARMUX and SARSEQ section for more guidance.

Values:

enumerator CY_SAR_MUX_FW_P0_VPLUS

Switch between Pin 0 of SARMUX and Vplus of SARADC.

enumerator CY_SAR_MUX_FW_P1_VPLUS

Switch between Pin 1 of SARMUX and Vplus of SARADC.

enumerator CY_SAR_MUX_FW_P2_VPLUS

Switch between Pin 2 of SARMUX and Vplus of SARADC.

enumerator CY_SAR_MUX_FW_P3_VPLUS

Switch between Pin 3 of SARMUX and Vplus of SARADC.

enumerator CY_SAR_MUX_FW_P4_VPLUS

Switch between Pin 4 of SARMUX and Vplus of SARADC.

enumerator CY_SAR_MUX_FW_P5_VPLUS

Switch between Pin 5 of SARMUX and Vplus of SARADC.

enumerator CY_SAR_MUX_FW_P6_VPLUS

Switch between Pin 6 of SARMUX and Vplus of SARADC.

enumerator CY_SAR_MUX_FW_P7_VPLUS

Switch between Pin 7 of SARMUX and Vplus of SARADC.

enumerator CY_SAR_MUX_FW_P0_VMINUS

Switch between Pin 0 of SARMUX and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_P1_VMINUS

Switch between Pin 1 of SARMUX and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_P2_VMINUS

Switch between Pin 2 of SARMUX and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_P3_VMINUS

Switch between Pin 3 of SARMUX and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_P4_VMINUS

Switch between Pin 4 of SARMUX and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_P5_VMINUS

Switch between Pin 5 of SARMUX and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_P6_VMINUS

Switch between Pin 6 of SARMUX and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_P7_VMINUS

Switch between Pin 7 of SARMUX and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_VSSA_VMINUS

Switch between VSSA and Vminus of SARADC.

enumerator CY_SAR_MUX_FW_TEMP_VPLUS

Switch between the DieTemp sensor and vplus of SARADC.

enumerator CY_SAR_MUX_FW_AMUXBUSA_VPLUS

Switch between AMUXBUSA and vplus of SARADC.

enumerator CY_SAR_MUX_FW_AMUXBUSB_VPLUS

Switch between AMUXBUSB and vplus of SARADC.

enumerator CY_SAR_MUX_FW_AMUXBUSA_VMINUS

Switch between AMUXBUSA and vminus of SARADC.

enumerator CY_SAR_MUX_FW_AMUXBUSB_VMINUS

Switch between AMUXBUSB and vminus of SARADC.

enumerator CY_SAR_MUX_FW_SARBUS0_VPLUS

Switch between SARBUS0 and vplus of SARADC.

enumerator CY_SAR_MUX_FW_SARBUS1_VPLUS

Switch between SARBUS1 and vplus of SARADC.

enumerator CY_SAR_MUX_FW_SARBUS0_VMINUS

Switch between SARBUS0 and vminus of SARADC.

enumerator CY_SAR_MUX_FW_SARBUS1_VMINUS

Switch between SARBUS1 and vminus of SARADC.

enumerator CY_SAR_MUX_FW_P4_COREIO0

Switch between Pin 4 of SARMUX and coreio0, if present.

enumerator CY_SAR_MUX_FW_P5_COREIO1

Switch between Pin 5 of SARMUX and coreio1, if present.

enumerator CY_SAR_MUX_FW_P6_COREIO2

Switch between Pin 6 of SARMUX and coreio2, if present.

enumerator CY_SAR_MUX_FW_P7_COREIO3

Switch between Pin 7 of SARMUX and coreio3, if present.

enum cy_en_sar_mux_switch_sq_ctrl_t

cy_en_sar_mux_switch_sq_ctrl_t: Mask definitions of SARMUX switches that can be controlled by the SARSEQ.

To enable sequencer control of multiple switches, “OR” the enum values together.

See the SARMUX and SARSEQ section for more guidance.

Values:

enumerator CY_SAR_MUX_SQ_CTRL_P0

Enable SARSEQ control of Pin 0 switches (for Vplus and Vminus) of SARMUX dedicated port.

enumerator CY_SAR_MUX_SQ_CTRL_P1

Enable SARSEQ control of Pin 1 switches (for Vplus and Vminus) of SARMUX dedicated port.

enumerator CY_SAR_MUX_SQ_CTRL_P2

Enable SARSEQ control of Pin 2 switches (for Vplus and Vminus) of SARMUX dedicated port.

enumerator CY_SAR_MUX_SQ_CTRL_P3

Enable SARSEQ control of Pin 3 switches (for Vplus and Vminus) of SARMUX dedicated port.

enumerator CY_SAR_MUX_SQ_CTRL_P4

Enable SARSEQ control of Pin 4 switches (for Vplus and Vminus) of SARMUX dedicated port.

enumerator CY_SAR_MUX_SQ_CTRL_P5

Enable SARSEQ control of Pin 5 switches (for Vplus and Vminus) of SARMUX dedicated port.

enumerator CY_SAR_MUX_SQ_CTRL_P6

Enable SARSEQ control of Pin 6 switches (for Vplus and Vminus) of SARMUX dedicated port.

enumerator CY_SAR_MUX_SQ_CTRL_P7

Enable SARSEQ control of Pin 7 switches (for Vplus and Vminus) of SARMUX dedicated port.

enumerator CY_SAR_MUX_SQ_CTRL_VSSA

Enable SARSEQ control of the switch between VSSA and Vminus.

enumerator CY_SAR_MUX_SQ_CTRL_TEMP

Enable SARSEQ control of the switch between DieTemp and Vplus.

enumerator CY_SAR_MUX_SQ_CTRL_AMUXBUSA

Enable SARSEQ control of AMUXBUSA switches (for Vplus and Vminus)

enumerator CY_SAR_MUX_SQ_CTRL_AMUXBUSB

Enable SARSEQ control of AMUXBUSB switches (for Vplus and Vminus)

enumerator CY_SAR_MUX_SQ_CTRL_SARBUS0

Enable SARSEQ control of SARBUS0 switches (for Vplus and Vminus)

enumerator CY_SAR_MUX_SQ_CTRL_SARBUS1

Enable SARSEQ control of SARBUS1 switches (for Vplus and Vminus)

enum cy_en_sar_clock_source_t

cy_en_sar_clock_source_t: For PASS_V2 the SAR clock can come from:

  • one of the CLK_PERI dividers

  • PASS Deep Sleep Clock (CLK_DPSLP)

Values:

enumerator CY_SAR_CLK_PERI

SAR clock source is one of PERI dividers (SAR is only operational in chip ACTIVE mode)

enumerator CY_SAR_CLK_DEEPSLEEP

SAR clock source is CLK_DPSLP (SAR can be operational in both chip ACTIVE and DEEPSLEEP modes)

enum cy_en_sar_simult_trig_event_sel_t

cy_en_sar_simult_trig_event_sel_t: Definitions for simultaneous scan trigger signal event selection.

Values:

enumerator CY_SAR_SIMULT_TRIG_EVENT_EDGE

Positive edge detected on the trigger signal triggers a new scan.

enumerator CY_SAR_SIMULT_TRIG_EVENT_LEVEL

SAR will do continuous scans as long as the trigger signal remains high.

enum cy_en_sar_simult_trig_sync_sel_t

cy_en_sar_simult_trig_sync_sel_t: Definitions for simultaneous scan trigger synchronization.

Values:

enumerator CY_SAR_SIMULT_TRIG_SYNC_NONE

Bypass clock domain synchronization of the simultaneous trigger signal.

enumerator CY_SAR_SIMULT_TRIG_SYNC_SAR_CLOCK

Synchronize the simultaneous trigger signal to the SAR clock domain.

enum cy_en_sar_simult_trig_sample_sel_t

cy_en_sar_simult_trig_sample_sel_t: Definitions for simultaneous scan sampling mode.

Values:

enumerator CY_SAR_SIMULT_TRIG_SAMPLE_SINGLE

Perform single scan on the trigger event.

enumerator CY_SAR_SIMULT_TRIG_SAMPLE_SCAN_CNT

On the trigger event perform number of scans, specified by scanCount.

enum cy_en_sar_simult_trig_intr_sel_t

cy_en_sar_simult_trig_intr_sel_t: Definitions for simultaneous scan interrupt generation.

Values:

enumerator CY_SAR_SIMULT_TRIG_INTR_EOS

Generate interrupt on each End of Sample event.

enumerator CY_SAR_SIMULT_TRIG_INTR_SCAN_CNT

Generate interrupt on End of Sample event only when sample number = scanCount.

Functions

cy_en_sar_status_t Cy_SAR_CommonInit(PASS_Type *base, const cy_stc_sar_common_config_t *trigConfig)

Initialize common SAR configuration registers.

    cy_en_sar_status_t status;

    const cy_stc_sar_common_config_t config =
    {
    /* .pwrUpDelay              */  0UL,                                    
    /* .scanCount               */  16UL,                                   
    /* .simultControl           */  CY_SAR_SAR0 | CY_SAR_SAR1,              
    /* .simultTrigSource        */  CY_SAR_SAR0,                            
    /* .simultTrigEvent         */  CY_SAR_SIMULT_TRIG_EVENT_EDGE,          
    /* .simultTrigSync          */  CY_SAR_SIMULT_TRIG_SYNC_SAR_CLOCK,      
    /* .simultSamplesPerTrigger */  CY_SAR_SIMULT_TRIG_SAMPLE_SCAN_CNT,     
    /* .simultEOSIntrSelect     */  CY_SAR_SIMULT_TRIG_INTR_EOS             
    };

    status = Cy_SAR_CommonInit(PASS, &config);

    if (CY_SAR_SUCCESS != status)
    {
        /* Insert error handling */
    }
Return

Function Usage

Parameters
  • base: Pointer to structure describing PASS registers.

  • trigConfig: Pointer to structure containing configuration data. See cy_stc_sar_common_config_t.

__STATIC_INLINE void Cy_SAR_SimultStart (PASS_Type *base, uint32_t sarMask, cy_en_sar_start_convert_sel_t mode)

Simultaneously starts two or more SARs.

Return

None

Function Usage

    /* Scenario: Simultaneously start continuous SAR0 and SAR1 scan */
    Cy_SAR_SimultStart(PASS, CY_SAR_SAR0 | CY_SAR_SAR1, CY_SAR_START_CONVERT_CONTINUOUS);

    /* Scenario: Stop SAR0 and SAR1 continuous scan */
    Cy_SAR_SimultStop(PASS, CY_SAR_SAR0 | CY_SAR_SAR1);

Parameters
  • base: Pointer to structure describing PASS registers.

  • sarMask: specifies which SAR instances will be started. Mask should contain at least two SAR instances for operation.

  • mode: specifies mode of SARs operation.

__STATIC_INLINE void Cy_SAR_SimultStop (PASS_Type *base, uint32_t sarMask)

Stops the selected SARs.

Return

None

Function Usage

    /* Scenario: Simultaneously start continuous SAR0 and SAR1 scan */
    Cy_SAR_SimultStart(PASS, CY_SAR_SAR0 | CY_SAR_SAR1, CY_SAR_START_CONVERT_CONTINUOUS);

    /* Scenario: Stop SAR0 and SAR1 continuous scan */
    Cy_SAR_SimultStop(PASS, CY_SAR_SAR0 | CY_SAR_SAR1);

Parameters
  • base: Pointer to structure describing PASS registers.

  • sarMask: specifies which SAR instances should be stopped.

cy_en_sar_status_t Cy_SAR_Init(SAR_Type *base, const cy_stc_sar_config_t *config)

Initialize all SAR configuration registers.

If routing is to be configured, all switches will be cleared before being initialized.

note

If interleaved averaging mode is used, the Differential Result Format should be the same as the Single-Ended Result Format. Otherwise, this function will return CY_SAR_BAD_PARAM.

Return

  • CY_SAR_SUCCESS : initialization complete successfylly

  • CY_SAR_BAD_PARAM : input pointers are null or some configuration setting is invalid, initialization incomplete.

Function Usage

    
    /* Scenario: Configure the SAR to sample two channels with a scan rate of 50 ksps.
     *  - Channel 0 is a single ended channel on P10.2
     *  - Channel 1 is a differential channel between P10.0 and P10.1.
    */
    #define CHANNEL_EN          3u  /* Enable channels 0 and 1. */
       
    #define CHANNEL_0_CONFIG    CY_SAR_CHAN_SINGLE_ENDED        /* Channel 0 is a single ended channel. */ \
                                | CY_SAR_CHAN_SAMPLE_TIME_0     /* Aperature time is set by Sample Time 0. */\
                                | CY_SAR_POS_PORT_ADDR_SARMUX   /* Use the SARMUX dedicated port (see the device datasheet for the SARMUX port). */\
                                | CY_SAR_CHAN_POS_PIN_ADDR_2    /* Use Pin 2 of the SARMUX. */\
                                | CY_SAR_CHAN_AVG_DISABLE       /* Disable averaging. */
    
    #define CHANNEL_1_CONFIG    CY_SAR_CHAN_DIFFERENTIAL_PAIRED /* Channel 1 is a differential paired channel. */ \
                                | CY_SAR_CHAN_SAMPLE_TIME_1     /* Aperature time is set by Sample Time 1. */\
                                | CY_SAR_POS_PORT_ADDR_SARMUX   /* Use the SARMUX dedicated port (see the device datasheet for the SARMUX port). */\
                                | CY_SAR_CHAN_POS_PIN_ADDR_0    /* Positive terminal is connected to Pin 0 and negative terminal is connected to Pin 1 of the SARMUX. */\
                                | CY_SAR_CHAN_AVG_ENABLE        /* Enable averaging. */

    #define CHANNEL_CONFIG      {(uint32_t)CHANNEL_0_CONFIG, \
                                 (uint32_t)CHANNEL_1_CONFIG, \
                                 0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U} /* All other channels are unconfigured. */

    #define CTRL                  (uint32_t)CY_SAR_VREF_PWR_100           /* Set reference voltage buffer to full power (100%) */\
                                | (uint32_t)CY_SAR_VREF_SEL_VDDA_DIV_2    /* Select internal VDDA/2 as the Vref. */\
                                | (uint32_t)CY_SAR_BYPASS_CAP_ENABLE      /* Enable Vref bypass capacitory. */\
                                | (uint32_t)CY_SAR_NEG_SEL_VREF           /* Use Vref as the negative terminal for all single-ended channels. */\
                                | (uint32_t)CY_SAR_CTRL_NEGVREF_HW        /* Enable hardware control of switch between Vref and negative terminal. */\
                                | (uint32_t)CY_SAR_CTRL_COMP_DLY_2P5      /* Set comparator latch delay to 2.5 ns delay for maximum conversion rates. */\
                                | (uint32_t)CY_SAR_COMP_PWR_100           /* Set comparator power to full power for maximum conversion rates. */\
                                | (uint32_t)CY_SAR_DEEPSLEEP_SARMUX_OFF   /* Disable SARMUX in Deep Sleep mode. */\
                                | (uint32_t)CY_SAR_SARSEQ_SWITCH_ENABLE   /* Enable the SARSEQ. */

    #define SAMPLE_CTRL           (uint32_t)CY_SAR_RIGHT_ALIGN                /* Right align result data to bits[11:0]. */\
                                | (uint32_t)CY_SAR_SINGLE_ENDED_UNSIGNED      /* Single ended channels are unsigned. */\
                                | (uint32_t)CY_SAR_DIFFERENTIAL_SIGNED        /* Differential channels are signed. */\
                                | (uint32_t)CY_SAR_AVG_CNT_2                  /* Set number of samples averaged to 2. */\
                                | (uint32_t)CY_SAR_AVG_MODE_SEQUENTIAL_FIXED  /* Averaging mode is sequential 12-bit fixed.*/\
                                | (uint32_t)CY_SAR_TRIGGER_MODE_FW_ONLY       /* Hardware trigger is disabled. */
    
    #define SAMPLE_TIME01       (135 << CY_SAR_SAMPLE_TIME0_SHIFT)  /* Sample Time 0 set to 134 ADC clock cycles. */ \
                                | (4 << CY_SAR_SAMPLE_TIME1_SHIFT)  /* Sample Time 1 set to 3 ADC clock cycles. */

    /* Note, sample times 2 and 3 are not used by any channels in this example. */
    #define SAMPLE_TIME23       (4 << CY_SAR_SAMPLE_TIME2_SHIFT)    /* Sample Time 2 set to 3 ADC clock cycles. */ \
                                | (4 << CY_SAR_SAMPLE_TIME3_SHIFT)  /* Sample Time 3 set to 3 ADC clock cycles. */

    #define RANGE_THRES         (0x300uL  << CY_SAR_RANGE_LOW_SHIFT)     /* Lower limit of range detection is 0x300. */\
                                | (0xC00uL  << CY_SAR_RANGE_HIGH_SHIFT) /* Upper limit of range detection is 0xC00. */

    #define INTR_MASK           CY_SAR_INTR_EOS | CY_SAR_INTR_OVERFLOW /* Enable both EOS and overflow interrupt evnts. */

    #define MUX_SWITCH          CY_SAR_MUX_FW_P2_VPLUS          /* Connect Pin 2 of the SARMUX to the positive terminal of the SARADC. */\
                                | CY_SAR_MUX_FW_P0_VPLUS        /* Connect Pin 0 of the SARMUX to the positive terminal of the SARADC. */\
                                | CY_SAR_MUX_FW_P1_VMINUS       /* Connect Pin 1 of the SARMUX to the negative terminal of the SARADC. */

    #define MUX_SWITCH_SQ_CTRL  CY_SAR_MUX_SQ_CTRL_P0           /* Enable sequencer control of Pins 0 of the SARMUX. */\
                                | CY_SAR_MUX_SQ_CTRL_P1         /* Enable sequencer control of Pins 1 of the SARMUX. */\
                                | CY_SAR_MUX_SQ_CTRL_P2         /* Enable sequencer control of Pins 2 of the SARMUX. */

    /* Define the config structure. */
    const cy_stc_sar_config_t config =
    {
        /* .ctrl               */   (uint32_t)CTRL,
        /* .sampleCtrl         */   (uint32_t)SAMPLE_CTRL,
        /* .sampleTime01       */   SAMPLE_TIME01,
        /* .sampleTime23       */   SAMPLE_TIME23,
        /* .rangeThres         */   RANGE_THRES,
        /* .rangeCond          */   CY_SAR_RANGE_COND_OUTSIDE,      /* Set limit condition to outside of lower and upper limits. */
        /* .chanEn             */   CHANNEL_EN,
        /* .chanConfig         */   CHANNEL_CONFIG,
        /* .intrMask           */   INTR_MASK,
        /* .satIntrMask        */   0u,                             /* Disable saturation interrupts. */
        /* .rangeIntrMask      */   0u,                             /* Disable limit interrupts. */
        /* .muxSwitch          */   MUX_SWITCH,
        /* .muxSwitchSqCtrl    */   MUX_SWITCH_SQ_CTRL,
        /* .configRouting      */   true,                           /* Configure the routing. */
        /* .vrefMvValue        */   1650u,                          /* Vdda = 3.3 V so Vref = Vdda/2 = 1.65 V. */
        /* .clock              */   CY_SAR_CLK_PERI,
        /* .fifoCfgPtr         */   NULL,
        /* .trTimer            */   false,
        /* .scanCnt            */   false,
        /* .scanCntIntr        */   false
    };
    
    cy_en_sar_status_t status;
    status = Cy_SAR_Init(SAR, &config);

    if (CY_SAR_SUCCESS == status)
    {
        /* Turn on the SAR hardware. */
        Cy_SAR_Enable(SAR);

        /* Begin continuous conversions. */
        Cy_SAR_StartConvert(SAR, CY_SAR_START_CONVERT_CONTINUOUS);
    }    

Parameters
  • base: Pointer to structure describing SAR instance registers

  • config: Pointer to structure containing configuration data. See cy_stc_sar_config_t and guidance in the Initialization and Enable section.

cy_en_sar_status_t Cy_SAR_DeInit(SAR_Type *base, bool deInitRouting)

Reset SAR registers back to power on reset defaults.

    /* Scenario: Switch to a different SAR configuration, for example, to scan different channels.
     * Disable and reset all SAR settings and analog routing before re-initialization. */
    
    bool deInitRouting = true;
    (void) Cy_SAR_DeInit(SAR, deInitRouting);
Return

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • deInitRouting: If true, all SARMUX switches are opened and switch control registers are reset to zero. If false, switch registers are untouched.

void Cy_SAR_Enable(SAR_Type *base)

Power up the SAR ADC subsystem block.

The hardware is ready to use after 2 us, which is included in this function.

Return

None

Parameters
  • base: Pointer to structure describing registers

void Cy_SAR_Disable(SAR_Type *base)

Turn off the hardware block.

Return

None

Parameters
  • base: Pointer to structure describing registers

void Cy_SAR_StartConvert(SAR_Type *base, cy_en_sar_start_convert_sel_t startSelect)

Start a single scan (one shot) of all enabled channels or start scanning continuously.

When in continuous mode, all firmware and hardware triggers are ignored. To stop continuous scanning, call Cy_SAR_StopConvert.

    /* Scenario: Initiate scanning in continuous mode. */
    Cy_SAR_StartConvert(SAR, CY_SAR_START_CONVERT_CONTINUOUS);
Return

None

Function Usage

Parameters

void Cy_SAR_StopConvert(SAR_Type *base)

Stop continuous scanning of enabled channels.

If a conversion is currently executing, that conversion will complete, but no further conversions will occur until the next call to Cy_SAR_StartConvert or the next hardware trigger, if enabled.

    /* Scenario: Stop continous scanning so that scans can be firmware triggered (one-shot mode). */
    Cy_SAR_StopConvert(SAR);
Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

cy_en_sar_status_t Cy_SAR_IsEndConversion(SAR_Type *base, cy_en_sar_return_mode_t retMode)

Immediately return the status of the conversion or does not return (blocking) until the conversion completes, depending on the retMode parameter.

In blocking mode, there is a time out of about 10 seconds for a CPU speed of 100 MHz.

note

CY_SAR_WAIT_FOR_RESULT and CY_SAR_WAIT_FOR_RESULT_INJ return modes are not recommended for use in RTOS environment.

    /* Scenario: SAR conversions are configured for one-shot firmware triggered mode.
     * Before triggering the next scan, make sure the current conversion has completed.
     * Implement a state machine to avoid blocking code. */
    
    #define SCAN    (0u)
    #define PROCESS (1u)
    
    uint8_t state = SCAN;
    cy_en_sar_status_t status;
    int16_t result = 0;
    int16_t injResult = 0;
    
    for(;;)
    {
        switch(state)
        {
        case SCAN:
            /* Initiate an injection channel sample within the next scan. */
            Cy_SAR_EnableInjection(SAR, true);
            /* Initiate a single (one shot) scan. */
            Cy_SAR_StartConvert(SAR, CY_SAR_START_CONVERT_SINGLE_SHOT);
            state = PROCESS;
            break;
        case PROCESS:
            break;
        default:
            /* Query end of conversion status. */
            status = Cy_SAR_IsEndConversion(SAR, CY_SAR_RETURN_STATUS);
            if (CY_SAR_SUCCESS == status)
            {
                /* Retrieve result and do something with it here. */
                result = Cy_SAR_GetResult16(SAR, 0);
                CY_UNUSED_PARAMETER(result); /* Suppress compiler errors */
                
                /* Start next scan. */
                state = SCAN;
            } /* else, conversion has not completed. */

            if (CY_SAR_SUCCESS == Cy_SAR_IsEndConversion(SAR, CY_SAR_RETURN_STATUS_INJ))
            {
                /* Retrieve result and do something with it here. */
                injResult = Cy_SAR_GetResult16(SAR, CY_SAR_INJ_CHANNEL);
                CY_UNUSED_PARAMETER(injResult); /* Suppress compiler errors */
            } /* else, conversion has not completed. */
            break;
        }
    }
Return

Side Effects

This function reads the end of conversion status and clears it after.

Function Usage

Parameters

int16_t Cy_SAR_GetResult16(const SAR_Type *base, uint32_t chan)

Return the data available in the channel result data register as a signed 16-bit integer.

    /* Scenario: ADC conversion has completed and result is valid.
     * Retrieve the result on channel 0 and convert it to millivolts. */
    uint32_t chan = 0UL;
    int16_t result;
    int16_t resultmV;
    
    result = Cy_SAR_GetResult16(SAR, chan);
    
    resultmV = Cy_SAR_CountsTo_mVolts(SAR, chan, result);
Return

Data is returned as a signed 16-bit integer. If channel number is invalid, 0 is returned.

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • chan: The channel to read the result from, between 0 and CY_SAR_INJ_CHANNEL

int32_t Cy_SAR_GetResult32(const SAR_Type *base, uint32_t chan)

Return the data available in the channel result data register as a signed 32-bit integer.

    /* Scenario: ADC conversion has completed and result is valid.
     * Retrieve the result on channel 0 as a signed 32-bit integer. */
    uint32_t chan = 0UL;
    int32_t result;
    
    result = Cy_SAR_GetResult32(SAR, chan);
Return

Data is returned as a signed 32-bit integer. If channel number is invalid, 0 is returned.

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • chan: The channel to read the result from, between 0 and CY_SAR_INJ_CHANNEL

__STATIC_INLINE uint32_t Cy_SAR_GetChanResultUpdated (const SAR_Type *base)

Return whether the RESULT register has been updated or not.

If the bit is high, the corresponding channel RESULT register was updated, i.e. was sampled during the previous scan and, in case of Interleaved averaging, reached the averaging count. If the bit is low, the corresponding channel is not enabled or the averaging count is not yet reached for Interleaved averaging.

    /* Scenario: The averaging mode has been set to interleaved.
     * In interleaved mode, it is not enough to rely on the EOS interrupt
     * to determine if the result is valid. One must call Cy_SAR_GetChanResultUpdated() as well. */
    
    uint32_t chan = 0UL;
    uint32_t chanMask = (1u << chan);
    uint32_t chanResultUpdated;
    
    chanResultUpdated = Cy_SAR_GetChanResultUpdated(SAR);
    if (chanMask == (chanResultUpdated & chanMask))
    {
        /* Averaging is complete and the result is valid. Retrieve the result and do something here. */
        
    } /* else, result is not yet valid. */
Return

Each bit of the result corresponds to the channel. Bit 0 is for channel 0, etc.

Function Usage

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE void Cy_SAR_EnableInjection (SAR_Type *base, bool tailgating)

Triggers the injection channel sample.

Function Usage

    /* Scenario: SAR conversions are configured for one-shot firmware triggered mode.
     * Before triggering the next scan, make sure the current conversion has completed.
     * Implement a state machine to avoid blocking code. */
    
    #define SCAN    (0u)
    #define PROCESS (1u)
    
    uint8_t state = SCAN;
    cy_en_sar_status_t status;
    int16_t result = 0;
    int16_t injResult = 0;
    
    for(;;)
    {
        switch(state)
        {
        case SCAN:
            /* Initiate an injection channel sample within the next scan. */
            Cy_SAR_EnableInjection(SAR, true);
            /* Initiate a single (one shot) scan. */
            Cy_SAR_StartConvert(SAR, CY_SAR_START_CONVERT_SINGLE_SHOT);
            state = PROCESS;
            break;
        case PROCESS:
            break;
        default:
            /* Query end of conversion status. */
            status = Cy_SAR_IsEndConversion(SAR, CY_SAR_RETURN_STATUS);
            if (CY_SAR_SUCCESS == status)
            {
                /* Retrieve result and do something with it here. */
                result = Cy_SAR_GetResult16(SAR, 0);
                CY_UNUSED_PARAMETER(result); /* Suppress compiler errors */
                
                /* Start next scan. */
                state = SCAN;
            } /* else, conversion has not completed. */

            if (CY_SAR_SUCCESS == Cy_SAR_IsEndConversion(SAR, CY_SAR_RETURN_STATUS_INJ))
            {
                /* Retrieve result and do something with it here. */
                injResult = Cy_SAR_GetResult16(SAR, CY_SAR_INJ_CHANNEL);
                CY_UNUSED_PARAMETER(injResult); /* Suppress compiler errors */
            } /* else, conversion has not completed. */
            break;
        }
    }

Parameters
  • base: Pointer to structure describing registers

  • tailgating: Injection channel tailgating enable:

    • true: The addressed pin is sampled after the next trigger and after all enabled channels have been scanned.

    • false: SAR is immediately triggered when the SAR is not busy. If the SAR is busy, the INJ channel addressed pin is sampled at the end of the current scan.

cy_en_syspm_status_t Cy_SAR_DeepSleepCallback(const cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode)

Callback to prepare the SAR before entering Deep Sleep and to re-enable the SAR after exiting Deep Sleep.

    
    /* Scenario: Before putting the device into Deep Sleep mode,
     * the SAR Deep Sleep callback must be registered to ensure
     * proper Deep Sleep entry and exit. */
    
    /* Set the base address pointer to the SAR hardware block. */
    static cy_stc_syspm_callback_params_t SARDeepSleepCallbackParams =
    {
        /* .base    */ SAR,
        /* .context */ NULL
    };
    
    /* Attach the Cy_SAR_DeepSleepCallback function and set the callback parameters. */
    static cy_stc_syspm_callback_t SARDeepSleepCallbackStruct =
    {
        /* .callback        */ (Cy_SysPmCallback)(&Cy_SAR_DeepSleepCallback),
        /* .type            */ CY_SYSPM_DEEPSLEEP,
        /* .skipMode        */ 0UL,
        /* .callbackParams  */ &SARDeepSleepCallbackParams,
        /* .prevItm         */ NULL,
        /* .nextItm         */ NULL,
        /* .order           */ 0
    };
    
    /* Register the callback before entering Deep Sleep mode. */
    Cy_SysPm_RegisterCallback(&SARDeepSleepCallbackStruct);
    
    /* Put the device into Deep Sleep mode and wait for an interrupt to wake up. */
    Cy_SysPm_DeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT);
Return

See cy_en_syspm_status_t

Function Usage

Parameters

void Cy_SAR_DeepSleep(SAR_Type *base)

This is the preferred routine to prepare the hardware for Deep Sleep.

It will call Cy_SAR_StopConvert to disable continuous conversions and wait for SAR conversions to stop before entering Deep Sleep. If the SARMUX is not configured for Deep Sleep operation, the entire SAR hardware block will be turned off.

This function is used in the

Cy_SAR_DeepSleepCallback. There is no need to call this function directly.
Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

void Cy_SAR_Wakeup(SAR_Type *base)

This is the preferred routine to restore the hardware to the state after calling Cy_SAR_DeepSleep.

Restoring the hardware involves re-enabling the hardware, the reference buffer, and continuous scanning if it was previously enabled before entering sleep.

This function is used in the

Cy_SAR_DeepSleepCallback. There is no need to call this function directly.
Side Effects

Calling this function without previously calling Cy_SAR_DeepSleep can lead to unpredictable results.

Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

void Cy_SAR_SetConvertMode(SAR_Type *base, cy_en_sar_sample_ctrl_trigger_mode_t mode)

Set the mode in which conversions are triggered.

This function does not start any conversions; it only configures the mode for subsequent conversions.

There are three modes:

  • firmware only; hardware triggering is disabled

  • firmware and edge sensitive hardware triggering

  • firmware and level sensitive hardware triggering

Note that firmware triggering is always enabled.

    
    /* Scenario: Allow a rising edge on a hardware trigger signal to initiate
     * a single conversion. FW triggering is still supported. The trigger signal
     * can come from a device pin or an internal block. Make sure route the hardware signal
     * to the SAR trigger input. */
    
    Cy_SAR_SetConvertMode(SAR, CY_SAR_TRIGGER_MODE_FW_AND_HWEDGE);
    
Return

None

Function Usage

Parameters

__STATIC_INLINE void Cy_SAR_SetChanMask (SAR_Type *base, uint32_t enableMask)

Set the enable/disable mask for the channels.

    /* Scenario: Channels 0 and 1 have been configured during initialization.
     * Channel 1 only needs to be scanned periodically. Disable it and only scan channel 0. */
    
    Cy_SAR_SetChanMask(SAR, 1UL);
    
Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • enableMask: Channel enable/disable mask. Each bit corresponds to a channel.

    • 0: the corresponding channel is disabled.

    • 1: the corresponding channel is enabled; it will be included in the next scan.

void Cy_SAR_SetLowLimit(SAR_Type *base, uint32_t lowLimit)

Set the low threshold for range detection.

The values are interpreted as signed or unsigned according to the channel configuration. Range detection is done on the value stored in the result register. That is, after averaging, shifting sign extension, and left/right alignment.

    
    /* Scenario: Range detection interrupts have been enabled for all unsigned channels.
     * Adjust the the low limit of the range detection to 0x300 and the high limit to 0xC00. */
    
    Cy_SAR_SetLowLimit(SAR, 0x300UL);
    Cy_SAR_SetHighLimit(SAR, 0xC00UL);
    
Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • lowLimit: The low threshold for range detection

void Cy_SAR_SetHighLimit(SAR_Type *base, uint32_t highLimit)

Set the high threshold for range detection.

The values are interpreted as signed or unsigned according to the channel configuration. Range detection is done on the value stored in the result register. That is, after averaging, shifting sign extension, and left/right alignment.

    
    /* Scenario: Range detection interrupts have been enabled for all unsigned channels.
     * Adjust the the low limit of the range detection to 0x300 and the high limit to 0xC00. */
    
    Cy_SAR_SetLowLimit(SAR, 0x300UL);
    Cy_SAR_SetHighLimit(SAR, 0xC00UL);
    
Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • highLimit: The high threshold for range detection

__STATIC_INLINE void Cy_SAR_SetRangeCond (SAR_Type *base, cy_en_sar_range_detect_condition_t cond)

Set the condition in which range detection interrupts are triggered.

    
    /* Scenario: Range detection interrupts have been enabled for all unsigned channels.
     * Set the range condition to be outside; a range interrupt is detected
     * when (result < lowLimit) || (highLimit <= result). */
    Cy_SAR_SetRangeCond(SAR, CY_SAR_RANGE_COND_OUTSIDE);
    
Return

None

Function Usage

Parameters

int16_t Cy_SAR_RawCounts2Counts(const SAR_Type *base, uint32_t chan, int16_t adcCounts)

Convert the channel result to a consistent result after accounting for averaging and subtracting the offset.

The equation used is:

Counts = (RawCounts/AvgDivider - Offset)

where,

This function is used by

Cy_SAR_CountsTo_Volts, Cy_SAR_CountsTo_mVolts, and Cy_SAR_CountsTo_uVolts. Calling this function directly is usually not needed.
Return

adcCounts after averaging and offset adjustments. If channel number is invalid, adcCounts is returned unmodified.

Function Usage

Parameters

float32_t Cy_SAR_CountsTo_Volts(const SAR_Type *base, uint32_t chan, int16_t adcCounts)

Convert the ADC output to Volts as a float32.

For example, if the ADC measured 0.534 volts, the return value would be 0.534. The calculation of voltage depends on the channel offset, gain and other parameters. The equation used is:

V = (RawCounts/AvgDivider - Offset)*TEN_VOLT/Gain

where,

note

This funtion is only valid when result alignment is right aligned.

    
    /* Scenario: ADC conversion has completed and result is valid.
     * Retrieve the result on channel 0 and convert it to volts. */
    uint32_t chan = 0UL;
    float32_t resultVolts;
    resultVolts = Cy_SAR_CountsTo_Volts(SAR, chan, Cy_SAR_GetResult16(SAR, chan));
Return

Result in Volts.

  • If channel number is invalid, 0 is returned.

  • If channel is left aligned, 0 is returned.

Function Usage

Parameters

int16_t Cy_SAR_CountsTo_mVolts(const SAR_Type *base, uint32_t chan, int16_t adcCounts)

Convert the ADC output to millivolts as an int16.

For example, if the ADC measured 0.534 volts, the return value would be 534. The calculation of voltage depends on the channel offset, gain and other parameters. The equation used is:

V = (RawCounts/AvgDivider - Offset)*TEN_VOLT/Gain
mV = V * 1000

where,

note

This funtion is only valid when result alignment is right aligned.

    /* Scenario: ADC conversion has completed and result is valid.
     * Retrieve the result on channel 0 and convert it to millivolts. */
    uint32_t chan = 0UL;
    int16_t resultmVolts;
    resultmVolts = Cy_SAR_CountsTo_mVolts(SAR, chan, Cy_SAR_GetResult16(SAR, chan));
Return

Result in millivolts.

  • If channel number is invalid, 0 is returned.

  • If channel is left aligned, 0 is returned.

Function Usage

Parameters

int32_t Cy_SAR_CountsTo_uVolts(const SAR_Type *base, uint32_t chan, int16_t adcCounts)

Convert the ADC output to microvolts as a int32.

For example, if the ADC measured 0.534 volts, the return value would be 534000. The calculation of voltage depends on the channel offset, gain and other parameters. The equation used is:

V = (RawCounts/AvgDivider - Offset)*TEN_VOLT/Gain
uV = V * 1000000

where,

note

This funtion is only valid when result alignment is right aligned.

    /* Scenario: ADC conversion has completed and result is valid.
     * Retrieve the result on channel 0 and convert it to microvolts. */
    uint32_t chan = 0UL;
    int32_t resultuVolts;
    resultuVolts = Cy_SAR_CountsTo_uVolts(SAR, chan, Cy_SAR_GetResult16(SAR, chan));
Return

Result in microvolts.

  • If channel number is valid, 0 is returned.

  • If channel is left aligned, 0 is returned.

Function Usage

Parameters

cy_en_sar_status_t Cy_SAR_SetChannelOffset(const SAR_Type *base, uint32_t chan, int16_t offset)

Store the channel offset for the voltage conversion functions.

Offset is applied to counts before unit scaling and gain. See Cy_SAR_CountsTo_Volts for more about this formula.

To change channel 0’s offset based on a known V_offset_mV, use:

Cy_SAR_SetOffset(0UL, -1 * V_offset_mV * (1UL << Resolution) / (2 * V_ref_mV));

Return

Parameters
  • base: Pointer to structure describing registers

  • chan: The channel number, between 0 and CY_SAR_INJ_CHANNEL.

  • offset: The count value measured when the inputs are shorted or connected to the same input voltage.

cy_en_sar_status_t Cy_SAR_SetChannelGain(const SAR_Type *base, uint32_t chan, int32_t adcGain)

Store the gain value for the voltage conversion functions.

The gain is configured at initialization in Cy_SAR_Init based on the SARADC resolution and voltage reference.

Gain is applied after offset and unit scaling. See Cy_SAR_CountsTo_Volts for more about this formula.

To change channel 0’s gain based on a known V_ref_mV, use:

Cy_SAR_SetGain(0UL, 10000 * (1UL << Resolution) / (2 * V_ref_mV));

Return

Parameters
  • base: Pointer to structure describing registers

  • chan: The channel number, between 0 and CY_SAR_INJ_CHANNEL.

  • adcGain: The gain in counts per 10 volt.

void Cy_SAR_SetAnalogSwitch(SAR_Type *base, cy_en_sar_switch_register_sel_t switchSelect, uint32_t switchMask, cy_en_sar_switch_state_t state)

Provide firmware control of the SARMUX switches for firmware sequencing.

Each call to this function can open or close a set of switches. Previously configured switches are untouched.

If the SARSEQ is enabled, there is no need to use this function.

    /* Scenario: 
     * - Channel 0 is configured as a differential pair between P10.0 and P10.1.
     * - Channel 1 is configured to sample the internal DieTemp sensor.
     * Close required switches to make these connections.
     * Make sure to also enable the SAR sequencer control of these same switches. */

    uint32_t chan0SwitchMask = CY_SAR_MUX_FW_P0_VPLUS | CY_SAR_MUX_FW_P1_VMINUS;
    uint32_t chan1SwitchMask = CY_SAR_MUX_FW_TEMP_VPLUS | CY_SAR_MUX_FW_VSSA_VMINUS;

    /* Close the switches for channel 0. */
    Cy_SAR_SetAnalogSwitch(SAR, CY_SAR_MUX_SWITCH0, chan0SwitchMask, CY_SAR_SWITCH_CLOSE);
    
    /* Close the switches for channel 1. */
    Cy_SAR_SetAnalogSwitch(SAR, CY_SAR_MUX_SWITCH0, chan1SwitchMask, CY_SAR_SWITCH_CLOSE);
    
Return

None

Function Usage

Parameters

uint32_t Cy_SAR_GetAnalogSwitch(const SAR_Type *base, cy_en_sar_switch_register_sel_t switchSelect)

Return the state (open or close) of SARMUX switches.

Return

Each bit corresponds to a single switch, where a bit value of 0 is open and 1 is closed. Compare this value to the switch masks in cy_en_sar_mux_switch_fw_ctrl_t.

Parameters
  • base: Pointer to structure describing registers

  • switchSelect: The switch register that contains the desired switches. Select a value from cy_en_sar_switch_register_sel_t.

__STATIC_INLINE void Cy_SAR_SetVssaVminusSwitch (SAR_Type *base, cy_en_sar_switch_state_t state)

Open or close the switch between VSSA and Vminus of the SARADC through firmware.

This function calls Cy_SAR_SetAnalogSwitch with switchSelect set to CY_SAR_MUX_SWITCH0 and switchMask set to SAR_MUX_SWITCH0_MUX_FW_VSSA_VMINUS_Msk.

    /* Scenario: Easily close the switch between Vminus of the SARADC and VSSA. */
    Cy_SAR_SetVssaVminusSwitch(SAR, CY_SAR_SWITCH_CLOSE);
    
Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • state: Open or close the switch. Select a value from cy_en_sar_switch_state_t.

void Cy_SAR_SetSwitchSarSeqCtrl(SAR_Type *base, uint32_t switchMask, cy_en_sar_switch_sar_seq_ctrl_t ctrl)

Enable or disable SARSEQ control of one or more switches.

Previously configured switches are untouched.

    /* Scenario: The SAR sequencer needs control of all switches on the dedicated SARMUX port
     * so that the channels can by sampled in a round robin fashion without CPU intervention. */
    
    uint32_t switchMask     = CY_SAR_MUX_SQ_CTRL_P0 \
                            | CY_SAR_MUX_SQ_CTRL_P1 \
                            | CY_SAR_MUX_SQ_CTRL_P2 \
                            | CY_SAR_MUX_SQ_CTRL_P3 \
                            | CY_SAR_MUX_SQ_CTRL_P4 \
                            | CY_SAR_MUX_SQ_CTRL_P5 \
                            | CY_SAR_MUX_SQ_CTRL_P6 \
                            | CY_SAR_MUX_SQ_CTRL_P7;

    Cy_SAR_SetSwitchSarSeqCtrl(SAR, switchMask, CY_SAR_SWITCH_SEQ_CTRL_ENABLE);
Return

None

Function Usage

Parameters

__STATIC_INLINE void Cy_SAR_SetVssaSarSeqCtrl (SAR_Type *base, cy_en_sar_switch_sar_seq_ctrl_t ctrl)

Enable or disable SARSEQ control of the switch between VSSA and Vminus of the SARADC.

This function calls Cy_SAR_SetSwitchSarSeqCtrl with switchMask set to SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_VSSA_Msk.

    /* Scenario: Easily enable SARSEQ control of the switch between Vminus of the SARADC and VSSA. */
    Cy_SAR_SetVssaSarSeqCtrl(SAR, CY_SAR_SWITCH_SEQ_CTRL_ENABLE);
    
Return

None

Function Usage

Parameters

__STATIC_INLINE uint32_t Cy_SAR_GetInterruptStatus (const SAR_Type *base)

Return the interrupt register status.


/* ISR function to handle all SAR interrupts. 
 * This same routine gets called when any of the enabled SAR interrupt sources
 * are enabled (EOS, overflow, FW collision, saturation detection, or range detection). */
void SAR_Interrupt(void)
{
    uint32_t intr_status = 0u;

    /* Read interrupt status register. */
    intr_status = Cy_SAR_GetInterruptStatus(SAR);

    /* Check what triggered the interrupt. */
    if ((intr_status & (uint32_t) CY_SAR_INTR_EOS) == (uint32_t) CY_SAR_INTR_EOS)
    {
        /* An end of scan occured, retrieve the ADC result and do something with it here. */
    }

    /* Check for the saturation detection status, if enabled. */

    /* Check for the range detection status, if enabled. */

    /* Clear the handled interrupt. */
    Cy_SAR_ClearInterrupt(SAR, intr_status);
}
Return

Interrupt status

Function Usage

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE void Cy_SAR_ClearInterrupt (SAR_Type *base, uint32_t intrMask)

Clear the interrupt.

The interrupt must be cleared with this function so that the hardware can set subsequent interrupts and those interrupts can be forwarded to the interrupt controller, if enabled.

Return

None

Parameters

__STATIC_INLINE void Cy_SAR_SetInterrupt (SAR_Type *base, uint32_t intrMask)

Trigger an interrupt with software.

Return

None

Parameters

__STATIC_INLINE void Cy_SAR_SetInterruptMask (SAR_Type *base, uint32_t intrMask)

Enable which interrupts can trigger the CPU interrupt controller.

    /* Scenario: Enable the EOS, overflow, and firmware collision interrupt sources.
     * Make sure to assign an ISR to handle the SAR interrupts. */

    Cy_SAR_SetInterruptMask(SAR, (uint32_t) (CY_SAR_INTR_EOS | CY_SAR_INTR_OVERFLOW | CY_SAR_INTR_FW_COLLISION));
    
Return

None

Function Usage

Parameters

__STATIC_INLINE uint32_t Cy_SAR_GetInterruptMask (const SAR_Type *base)

Return which interrupts can trigger the CPU interrupt controller as configured by Cy_SAR_SetInterruptMask.

    /* Scenario: Check whether a specific interrupt source is enabled. */
    
    uint32_t intrMask;
    intrMask = Cy_SAR_GetInterruptMask(SAR);
    
    if ((uint32_t) CY_SAR_INTR_EOS == (intrMask & (uint32_t) CY_SAR_INTR_EOS))
    {
        /* EOS interrupt was enabled. */
    }
Return

Interrupt mask. Compare this value with masks in Interrupt Masks.

Function Usage

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE uint32_t Cy_SAR_GetInterruptStatusMasked (const SAR_Type *base)

Return the bitwise AND between the interrupt request and mask registers.

See Cy_SAR_GetInterruptStatus and Cy_SAR_GetInterruptMask.

Return

Bitwise AND of the interrupt request and mask registers

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE uint32_t Cy_SAR_GetRangeInterruptStatus (const SAR_Type *base)

Return the range interrupt register status.

If the status bit is low for a channel, the channel may not be enabled (Cy_SAR_SetChanMask), range detection is not enabled for the channel (Cy_SAR_SetRangeInterruptMask), or range detection was not triggered for the channel.

    /* Scenario: Range detection has been enabled for at least one channel.
     * Check the range interrupt status in the ISR when an interrupt occurs. */
    
    uint32_t intr_status = 0u;
    
    /* Read the range detection interrupt status register. */
    intr_status = Cy_SAR_GetRangeInterruptStatus(SAR);

    if (intr_status > 0u)
    {
        /* One or more channels triggered the range detection interrupt, do something here. */
    }

    /* Clear the handled range interrupt. */
    Cy_SAR_ClearRangeInterrupt(SAR, intr_status);

    /* Perform a dummy read of the range interrupt status register for buffered writes. */
    (void)Cy_SAR_GetRangeInterruptStatus(SAR);
Return

The range interrupt status for all channels. Bit 0 is for channel 0, etc.

Function Usage

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE void Cy_SAR_ClearRangeInterrupt (SAR_Type *base, uint32_t chanMask)

Clear the range interrupt for the specified channel mask.

The interrupt must be cleared with this function so that the hardware can set subset interrupts and those interrupts can be forwarded to the interrupt controller, if enabled.

Return

None

Parameters
  • base: Pointer to structure describing registers

  • chanMask: The channel mask. Bit 0 is for channel 0, etc. Typically, this is the value returned from Cy_SAR_GetRangeInterruptStatus.

__STATIC_INLINE void Cy_SAR_SetRangeInterrupt (SAR_Type *base, uint32_t chanMask)

Trigger a range interrupt with software for the specific channel mask.

Return

None

Parameters
  • base: Pointer to structure describing registers

  • chanMask: The channel mask. Bit 0 is for channel 0, etc.

__STATIC_INLINE void Cy_SAR_SetRangeInterruptMask (SAR_Type *base, uint32_t chanMask)

Enable which channels can trigger a range interrupt.

    /* Scenario: Enable the range detection interrupt for channel 0 only.
     * Make sure to assign an ISR to handle the SAR interrupts. */
    uint32_t chanMask = 1UL;
    Cy_SAR_SetRangeInterruptMask(SAR, chanMask);
    
Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • chanMask: The channel mask. Bit 0 is for channel 0, etc.

__STATIC_INLINE uint32_t Cy_SAR_GetRangeInterruptMask (const SAR_Type *base)

Return which interrupts can trigger a range interrupt as configured by Cy_SAR_SetRangeInterruptMask.

Return

The range interrupt mask

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE uint32_t Cy_SAR_GetRangeInterruptStatusMasked (const SAR_Type *base)

Return the bitwise AND between the range interrupt request and mask registers.

See Cy_SAR_GetRangeInterruptStatus and Cy_SAR_GetRangeInterruptMask.

Return

Bitwise AND between of range interrupt request and mask

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE uint32_t Cy_SAR_GetSatInterruptStatus (const SAR_Type *base)

Return the saturate interrupt register status.

If the status bit is low for a channel, the channel may not be enabled (Cy_SAR_SetChanMask), saturation detection is not enabled for the channel (Cy_SAR_SetSatInterruptMask), or saturation detection was not triggered for the channel.

    /* Scenario: Saturation detection has been enabled for at least one channel.
     * Check the saturation interrupt status in the ISR when an interrupt occurs. */
    
    uint32_t intr_status = 0u;
    
    /* Read the saturation detection interrupt status register. */
    intr_status = Cy_SAR_GetSatInterruptStatus(SAR);

    if (intr_status > 0u)
    {
        /* One or more channel saturated (the sampled value is equal to the
         * minimum or maximum, do something here. */
    }

    /* Clear the handled saturation interrupt. */
    Cy_SAR_ClearSatInterrupt(SAR, intr_status);

    /* Perform a dummy read of the saturation interrupt status register for buffered writes. */
    (void)Cy_SAR_GetSatInterruptStatus(SAR);
Return

The saturate interrupt status for all channels. Bit 0 is for channel 0, etc.

Function Usage

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE void Cy_SAR_ClearSatInterrupt (SAR_Type *base, uint32_t chanMask)

Clear the saturate interrupt for the specified channel mask.

The interrupt must be cleared with this function so that the hardware can set subsequent interrupts and those interrupts can be forwarded to the interrupt controller, if enabled.

Return

None

Parameters
  • base: Pointer to structure describing registers

  • chanMask: The channel mask. Bit 0 is for channel 0, etc. Typically, this is the value returned from Cy_SAR_GetSatInterruptStatus.

__STATIC_INLINE void Cy_SAR_SetSatInterrupt (SAR_Type *base, uint32_t chanMask)

Trigger a saturate interrupt with software for the specific channel mask.

Return

None

Parameters
  • base: Pointer to structure describing registers

  • chanMask: The channel mask. Bit 0 is for channel 0, etc.

__STATIC_INLINE void Cy_SAR_SetSatInterruptMask (SAR_Type *base, uint32_t chanMask)

Enable which channels can trigger a saturate interrupt.

    /* Scenario: Enable the saturation detection interrupt for all 16 channels.
     * Only enabled channels, see Cy_SAR_SetChanMask(), are scanned. 
     * Make sure to assign an ISR to handle the SAR interrupts. */
    
    uint32_t chanMask = 0xFFFFUL;
    Cy_SAR_SetSatInterruptMask(SAR, chanMask);
Return

None

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • chanMask: The channel mask. Bit 0 is for channel 0, etc.

__STATIC_INLINE uint32_t Cy_SAR_GetSatInterruptMask (const SAR_Type *base)

Return which interrupts can trigger a saturate interrupt as configured by Cy_SAR_SetSatInterruptMask.

Return

The saturate interrupt mask. Bit 0 is for channel 0, etc.

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE uint32_t Cy_SAR_GetSatInterruptStatusMasked (const SAR_Type *base)

Return the bitwise AND between the saturate interrupt request and mask registers.

See Cy_SAR_GetSatInterruptStatus and Cy_SAR_GetSatInterruptMask.

Return

Bitwise AND of the saturate interrupt request and mask

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE uint32_t Cy_SAR_GetInterruptCause (const SAR_Type *base)

Return the cause of the interrupt.

The interrupt routine can be called due to one of the following events:

  • End of scan (EOS)

  • Overflow

  • Firmware collision

  • Saturation detected on one or more channels

  • Range detected on one or more channels

Return

Mask of what caused the interrupt. Compare this value with one of these masks:

  • SAR_INTR_CAUSE_EOS_MASKED_MIR_Msk : EOS caused the interrupt

  • SAR_INTR_CAUSE_OVERFLOW_MASKED_MIR_Msk : Overflow caused the interrupt

  • SAR_INTR_CAUSE_FW_COLLISION_MASKED_MIR_Msk : Firmware collision cause the interrupt

  • SAR_INTR_CAUSE_SATURATE_MASKED_RED_Msk : Saturation detection on one or more channels caused the interrupt

  • SAR_INTR_CAUSE_RANGE_MASKED_RED_Msk : Range detection on one or more channels caused the interrupt

Parameters
  • base: Pointer to structure describing registers

bool Cy_SAR_IsChannelSigned(const SAR_Type *base, uint32_t chan)

Return true if channel result is configured for signed format, else false.

The formats for single-ended and differential channels are independent. This function will first check whether the channel is single-ended or differential.

    /* Query if channel 0 is signed. */
    bool isSigned;
    
    isSigned = Cy_SAR_IsChannelSigned(SAR, 0UL);
Return

If channel number is invalid, false is returned

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • chan: The channel to check, between 0 and CY_SAR_INJ_CHANNEL

bool Cy_SAR_IsChannelSingleEnded(const SAR_Type *base, uint32_t chan)

Return true if channel is single ended, else false.

    /* Query if channel 0 is single ended. */
    bool isSingleEnded;
    
    isSingleEnded = Cy_SAR_IsChannelSingleEnded(SAR, 0UL);
Return

If channel number is invalid, false is returned

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • chan: The channel to check, between 0 and CY_SAR_INJ_CHANNEL

__STATIC_INLINE bool Cy_SAR_IsChannelDifferential (const SAR_Type *base, uint32_t chan)

Return true of channel is differential, else false.

    /* Query if channel 0 is differential. */
    bool isDifferential;
    
    isDifferential = Cy_SAR_IsChannelDifferential(SAR, 0UL);
Return

A false is return if chan is invalid.

Function Usage

Parameters
  • base: Pointer to structure describing registers

  • chan: The channel to check, starting at 0.

cy_en_sar_status_t Cy_SAR_ScanCountEnable(const SAR_Type *base)

Enables the Scanning Counter.

Suitable for PASS_V2.

Return

The status:

  • CY_SAR_BAD_PARAM - either the feature is not supported by this IP version or the injection channel is triggered and not tailgating.

  • CY_SAR_SUCCESS - the SAR Scanning Counter feature is successfully enabled.

Function Usage

    /* Scenario: SAR is going to be used in Deep Sleep Mode */
    Cy_SAR_SelectClock(SAR0, CY_SAR_CLK_DEEPSLEEP);

    /* Scenario: And also SAR will take several samples at one Timer trigger.
     * Presuming the Scan Counter is configured here using  Cy_SAR_CommonInit().
     */

    if (CY_SAR_SUCCESS != Cy_SAR_ScanCountEnable(SAR0))
    {
        /* insert error handling */
    }

    /* Scenario: All these low power features are not needed more */
    Cy_SAR_ScanCountDisable(SAR0);
    Cy_SAR_SelectClock(SAR0, CY_SAR_CLK_PERI);

Parameters
  • base: Pointer to the structure of SAR instance registers.

__STATIC_INLINE void Cy_SAR_ScanCountDisable (const SAR_Type *base)

Disables the Scanning Counter.

Function Usage

    /* Scenario: SAR is going to be used in Deep Sleep Mode */
    Cy_SAR_SelectClock(SAR0, CY_SAR_CLK_DEEPSLEEP);

    /* Scenario: And also SAR will take several samples at one Timer trigger.
     * Presuming the Scan Counter is configured here using  Cy_SAR_CommonInit().
     */

    if (CY_SAR_SUCCESS != Cy_SAR_ScanCountEnable(SAR0))
    {
        /* insert error handling */
    }

    /* Scenario: All these low power features are not needed more */
    Cy_SAR_ScanCountDisable(SAR0);
    Cy_SAR_SelectClock(SAR0, CY_SAR_CLK_PERI);

Parameters
  • base: Pointer to the structure of SAR instance registers.

__STATIC_INLINE void Cy_SAR_SelectClock (const SAR_Type *base, cy_en_sar_clock_source_t clock)

Switch the SAR input clock source.

Suitable for PASS_V2 only. In case of CY_SAR_CLK_DEEPSLEEP it enables SAR operation in Deep Sleep mode.

Function Usage

    /* Scenario: SAR is going to be used in Deep Sleep Mode */
    Cy_SAR_SelectClock(SAR0, CY_SAR_CLK_DEEPSLEEP);

    /* Scenario: And also SAR will take several samples at one Timer trigger.
     * Presuming the Scan Counter is configured here using  Cy_SAR_CommonInit().
     */

    if (CY_SAR_SUCCESS != Cy_SAR_ScanCountEnable(SAR0))
    {
        /* insert error handling */
    }

    /* Scenario: All these low power features are not needed more */
    Cy_SAR_ScanCountDisable(SAR0);
    Cy_SAR_SelectClock(SAR0, CY_SAR_CLK_PERI);

Parameters

__STATIC_INLINE void Cy_SAR_FifoRead (const SAR_Type *base, cy_stc_sar_fifo_read_t *readStruct)

Reads FIFO word-by-word.

Return

Subsequent data sample

Function Usage

    /* Scenario: Enable FIFO before work */
    Cy_SAR_FifoEnable(SAR0);

    /* Scenario: Collect channel data from the FIFO */
    #define FIFO_DEPTH (64UL)
    #define CHAN_NUM   (16UL)
    
    cy_stc_sar_fifo_config_t fifoConfig =
    {
        .chanId = true, /* fifoRead.channel will contain channel number */
        .chainToNext = false, /* No FIFO chaining */
        .clrTrIntrOnRead = false, /* Interrupt is cleared by interrupt handler */
        .level = FIFO_DEPTH, /* FIFO depth is 64 if no chaining */
        .trOut = false /* Interrupt is used to get fifo data */
    };
    
    config.fifoCfgPtr = &fifoConfig;
    (void) Cy_SAR_Init(SAR0, &config); /* Initialize SAR with FIFO */
    Cy_SAR_Enable(SAR0); /* FIFO is enabled with SAR if if fifoCfgPtr is not NULL */
    
    /* Then, for example in the interrupt handler: */
    uint16_t sarResults[CHAN_NUM][FIFO_DEPTH];
    cy_stc_sar_fifo_read_t fifoRead;
    uint32_t numSamples = Cy_SAR_FifoGetDataCount(SAR0);

    for (uint32_t i = 0; i < numSamples; i++)
    {
        Cy_SAR_FifoRead(SAR0, &fifoRead);
        sarResults[fifoRead.channel][i] = fifoRead.value;
    }

    /* Scenario: FIFO is no more needed - reinitialize SAR without FIFO */
    Cy_SAR_Disable(SAR0); /* FIFO is disabled with SAR */
    config.fifoCfgPtr = NULL;
    (void) Cy_SAR_Init(SAR0, &config);
    Cy_SAR_Enable(SAR0); /* Now FIFO is not enabled with SAR if fifoCfgPtr = NULL */
    

__STATIC_INLINE uint32_t Cy_SAR_FifoGetDataCount (const SAR_Type *base)

Returns a number of non-empty FIFO cells.

Return

Number of FIFO samples.

Function Usage

    /* Scenario: Enable FIFO before work */
    Cy_SAR_FifoEnable(SAR0);

    /* Scenario: Collect channel data from the FIFO */
    #define FIFO_DEPTH (64UL)
    #define CHAN_NUM   (16UL)
    
    cy_stc_sar_fifo_config_t fifoConfig =
    {
        .chanId = true, /* fifoRead.channel will contain channel number */
        .chainToNext = false, /* No FIFO chaining */
        .clrTrIntrOnRead = false, /* Interrupt is cleared by interrupt handler */
        .level = FIFO_DEPTH, /* FIFO depth is 64 if no chaining */
        .trOut = false /* Interrupt is used to get fifo data */
    };
    
    config.fifoCfgPtr = &fifoConfig;
    (void) Cy_SAR_Init(SAR0, &config); /* Initialize SAR with FIFO */
    Cy_SAR_Enable(SAR0); /* FIFO is enabled with SAR if if fifoCfgPtr is not NULL */
    
    /* Then, for example in the interrupt handler: */
    uint16_t sarResults[CHAN_NUM][FIFO_DEPTH];
    cy_stc_sar_fifo_read_t fifoRead;
    uint32_t numSamples = Cy_SAR_FifoGetDataCount(SAR0);

    for (uint32_t i = 0; i < numSamples; i++)
    {
        Cy_SAR_FifoRead(SAR0, &fifoRead);
        sarResults[fifoRead.channel][i] = fifoRead.value;
    }

    /* Scenario: FIFO is no more needed - reinitialize SAR without FIFO */
    Cy_SAR_Disable(SAR0); /* FIFO is disabled with SAR */
    config.fifoCfgPtr = NULL;
    (void) Cy_SAR_Init(SAR0, &config);
    Cy_SAR_Enable(SAR0); /* Now FIFO is not enabled with SAR if fifoCfgPtr = NULL */
    

__STATIC_INLINE void Cy_SAR_FifoSetLevel (const SAR_Type *base, uint32_t level)

Sets the FIFO trigger level which specifies how many samples FIFO should contain in order to generate trigger event.

Return

None

Parameters
  • base: Pointer to structure describing registers

  • level: The FIFO trigger level to be set. Range: 1..256.

__STATIC_INLINE void Cy_SAR_ClearFifoInterrupt (const SAR_Type *base, uint32_t intrMask)

Clear the FIFO interrupt.

The interrupt must be cleared with this function so that the hardware can set subsequent interrupts and those interrupts can be forwarded to the interrupt controller, if enabled.

Return

None

Parameters

__STATIC_INLINE void Cy_SAR_SetFifoInterrupt (const SAR_Type *base, uint32_t intrMask)

Trigger an interrupt with software.

Return

None

Parameters

__STATIC_INLINE void Cy_SAR_SetFifoInterruptMask (const SAR_Type *base, uint32_t intrMask)

Enable which interrupts can trigger the CPU interrupt controller.

Return

None

Parameters

__STATIC_INLINE uint32_t Cy_SAR_GetFifoInterruptStatus (const SAR_Type *base)

Return the interrupt register status.

Return

Interrupt status Interrupt Masks.

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE uint32_t Cy_SAR_GetFifoInterruptMask (const SAR_Type *base)

Return which interrupts can trigger the CPU interrupt controller as configured by Cy_SAR_SetFifoInterruptMask.

Return

Interrupt mask. Compare this value with masks in Interrupt Masks.

Parameters
  • base: Pointer to structure describing registers

__STATIC_INLINE uint32_t Cy_SAR_GetFifoInterruptStatusMasked (const SAR_Type *base)

Return the bitwise AND between the interrupt request and mask registers.

See Cy_SAR_GetFifoInterruptStatus and Cy_SAR_GetFifoInterruptMask.

Return

Bitwise AND of the interrupt request and mask registers Interrupt Masks.

Parameters
  • base: Pointer to structure describing registers

struct cy_stc_sar_fifo_config_t
#include <cy_sar.h>

FIFO configuration structure.

Public Members

bool chanId

Enable the channel ID in the results.

bool chainToNext

Chain the FIFO to the next FIFO.

bool clrTrIntrOnRead

Enable the FIFO level trigger (and optional level interrupt) clearing on FIFO read.

uint32_t level

A trigger (and optional interrupt) event occurs when the number of FIFO entries overcomes the Level setting.

Range: 1..256

bool trOut

SAR output trigger is set by the ‘level’ condition.

struct cy_stc_sar_config_t
#include <cy_sar.h>

This structure is used to initialize the SAR ADC subsystem.

The SAR ADC subsystem is highly configurable with many options. When calling Cy_SAR_Init, provide a pointer to the structure containing this configuration data. A set of enumerations is provided in this driver to help with configuring this structure.

See the Initialization and Enable section for guidance.

Public Members

uint32_t ctrl

Control register settings (applies to all channels)

uint32_t sampleCtrl

Sample control register settings (applies to all channels)

uint32_t sampleTime01

Sample time in ADC clocks for Sample Time 0 and 1.

uint32_t sampleTime23

Sample time in ADC clocks for Sample Time 2 and 3.

uint32_t rangeThres

Range detect threshold register for all channels.

cy_en_sar_range_detect_condition_t rangeCond

Range detect condition (below, inside, output, or above) for all channels.

uint32_t chanEn

Enable bits for the channels.

uint32_t chanConfig[CY_SAR_NUM_CHANNELS]

Channel configuration.

uint32_t intrMask

Interrupt enable mask.

uint32_t satIntrMask

Saturation detection interrupt enable mask.

uint32_t rangeIntrMask

Range detection interrupt enable mask.

uint32_t muxSwitch

SARMUX firmware switches to connect analog signals to SAR.

uint32_t muxSwitchSqCtrl

Enable SARSEQ control of specific SARMUX switches.

bool configRouting

Configure or ignore routing related registers (muxSwitch, muxSwitchSqCtrl)

uint32_t vrefMvValue

Reference voltage in millivolts used in converting counts to volts.

cy_en_sar_clock_source_t clock

Clock source selection (enable/disable SAR operation in the Deep Sleep mode).

Ignored for PASS_ver1.

cy_stc_sar_fifo_config_t const *fifoCfgPtr

Pointer to the FIFO configuration structure cy_stc_sar_fifo_config_t, if NULL - the FIFO is not used.

Should be NULL for PASS_ver1.

bool trTimer

SAR is being triggered from the Timer Timer .

Ignored for PASS_ver1.

bool scanCnt

Enable the scanning counter, configured by Cy_SAR_CommonInit.

Ignored for PASS_ver1.

bool scanCntIntr

EOS interrupt on scanning counter event.

Ignored for PASS_ver1.

struct cy_stc_sar_common_config_t
#include <cy_sar.h>

SAR triggering configuration structure.

Public Members

uint32_t pwrUpDelay

Power up delay for SAR blocks in Deep Sleep Clock cycles.

Range 0..255.

uint32_t scanCount

Configures the number of samples SAR will take when triggered.

Range 1..256.

uint32_t simultControl

Configures the SAR ADCs for simultaneous control.

The value is a combined mask, created using following macros:

uint32_t simultTrigSource

Configures the trigger source for simultaneous SAR hardware trigger.

Use one of the following values:

cy_en_sar_simult_trig_event_sel_t simultTrigEvent

Configures simultaneous trigger signal event.

cy_en_sar_simult_trig_sync_sel_t simultTrigSync

Enables synchronization of trigger signal.

cy_en_sar_simult_trig_sample_sel_t simultSamplesPerTrigger

Configures scan sampling mode for each trigger event.

cy_en_sar_simult_trig_intr_sel_t simultEOSIntrSelect

Configures EOS interrupt condition.

struct cy_stc_sar_state_backup_t
#include <cy_sar.h>

This structure is used by the driver to backup the state of the SAR before entering sleep so that it can be re-enabled after waking up.

Public Members

uint32_t hwEnabled

SAR enabled state.

uint32_t continuous

State of the continuous bit.

struct cy_stc_sar_fifo_read_t
#include <cy_sar.h>

Structure to read the FIFO buffer.

Public Members

uint16_t value

SAR sample.

uint16_t channel

SAR channel.