Data Structures¶
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group
group_mcwdt_data_structures
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struct
MCWDT_STRUCT_Type
¶ - #include <ip_type.h>
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struct
cy_stc_mcwdt_config_t
- #include <cy_mcwdt.h>
The MCWDT component configuration structure.
Public Members
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uint16_t
c0Match
The sub-counter#0 match comparison value, for interrupt or watchdog timeout.
Range: 0 - 65535 for c0ClearOnMatch = 0 and 1 - 65535 for c0ClearOnMatch = 1.
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uint16_t
c1Match
The sub-counter#1 match comparison value, for interrupt or watchdog timeout.
Range: 0 - 65535 for c1ClearOnMatch = 0 and 1 - 65535 for c1ClearOnMatch = 1.
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uint8_t
c0Mode
The sub-counter#0 mode.
It can have the following values: CY_MCWDT_MODE_NONE, CY_MCWDT_MODE_INT, CY_MCWDT_MODE_RESET and CY_MCWDT_MODE_INT_RESET.
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uint8_t
c1Mode
The sub-counter#1 mode.
It can have the following values: CY_MCWDT_MODE_NONE, CY_MCWDT_MODE_INT, CY_MCWDT_MODE_RESET and CY_MCWDT_MODE_INT_RESET.
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uint8_t
c2ToggleBit
The sub-counter#2 Period / Toggle Bit value.
Range: 0 - 31.
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uint8_t
c2Mode
The sub-counter#2 mode.
It can have the following values: CY_MCWDT_MODE_NONE and CY_MCWDT_MODE_INT.
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bool
c0ClearOnMatch
The sub-counter#0 Clear On Match parameter enabled/disabled.
note
This parameter is available for devices having MXS40SSRSS IP.
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bool
c1ClearOnMatch
The sub-counter#1 Clear On Match parameter enabled/disabled.
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bool
c0c1Cascade
The sub-counter#1 is clocked by LFCLK or from sub-counter#0 cascade.
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bool
c1c2Cascade
The sub-counter#2 is clocked by LFCLK or from sub-counter#1 cascade.
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uint16_t
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struct