UART TX FIFO Statuses¶
Each UART TX FIFO status is encoded in a separate bit, therefore multiple bits may be set to indicate the current status.
The number of entries in the TX FIFO is less than the TX FIFO trigger level value.
The TX FIFO is not full, there is a space for more data.
The TX FIFO is empty, note there may still be data in the shift register.
An attempt to write to the full TX FIFO.
An attempt to read from an empty transmitter FIFO (hardware reads).
All data has been transmitted out of the FIFO, including shifter.
SmartCard only: the transmitter received a NACK.
SmartCard only: the transmitter lost arbitration.