Functions

group group_sysclk_clk_hf_funcs

Functions

cy_en_sysclk_status_t Cy_SysClk_ClkHfEnable(uint32_t clkHf)

Enables the selected clkHf.

Return

cy_en_sysclk_status_t CY_SYSCLK_INVALID_STATE - ECO already enabled For the PSoC 64 devices there are possible situations when function returns the PRA error status code. This is because for PSoC 64 devices the function uses the PRA driver to change the protected registers. Refer to cy_en_pra_status_t for more details.

Function Usage

    /* Scenario: ECO needs to source HFCLK2 through Path 2. The ECO is
                 configured through its function calls. */

    #define CLKPATH2 (2UL)
    #define HFCLK2 (2UL)

    uint32_t clkPathMuxFreq = 0UL; /* Variable to store the Clock Path Mux output frequency */

    /* Set the clock path 2 mux to be sourced from ECO */
    if(CY_SYSCLK_SUCCESS == Cy_SysClk_ClkPathSetSource(CLKPATH2, CY_SYSCLK_CLKPATH_IN_ECO))
    {
        clkPathMuxFreq = Cy_SysClk_ClkPathMuxGetFrequency(CLKPATH2);
        /* Now clkPathMuxFreq contains the Clock Path Mux output frequency */
    }
    else
    {
        /* Perform error handling */
    }

    /* Set the HFCLK2 source to clock path 2 and enable HFCLK2 */
    (void)Cy_SysClk_ClkHfSetSource(HFCLK2, CY_SYSCLK_CLKHF_IN_CLKPATH2);

    /* Enable HFCLK2  */
    (void)Cy_SysClk_ClkHfEnable(HFCLK2);

Parameters
  • clkHf: Selects which clkHf to enable.

bool Cy_SysClk_ClkHfIsEnabled(uint32_t clkHf)

Reports the Enabled/Disabled status of clkHf.

note

This API is available for CAT1A devices.

Return

Boolean status of clkHf: true - Enabled, false - Disabled.

Function Usage

    /* Scenario: HFCLK1 is no longer required in the application and can be
                 switched off.
       Note:     HFCLK0 cannot be disabled */

    #define HFCLK1 (1UL)

    if (Cy_SysClk_ClkHfIsEnabled(HFCLK1))
    {
        /* Disable HFCLK1 */
        (void)Cy_SysClk_ClkHfDisable(HFCLK1);
    }

Parameters
  • clkHf: Selects which clkHf to check.

cy_en_sysclk_status_t Cy_SysClk_ClkHfDisable(uint32_t clkHf)

Disables the selected clkHf.

note

clkHf[0] cannot be disabled.

Return

cy_en_sysclk_status_t

Function Usage

    /* Scenario: HFCLK1 is no longer required in the application and can be
                 switched off.
       Note:     HFCLK0 cannot be disabled */

    #define HFCLK1 (1UL)

    if (Cy_SysClk_ClkHfIsEnabled(HFCLK1))
    {
        /* Disable HFCLK1 */
        (void)Cy_SysClk_ClkHfDisable(HFCLK1);
    }

Parameters
  • clkHf: Selects which clkHf to enable.

cy_en_sysclk_status_t Cy_SysClk_ClkHfSetSource(uint32_t clkHf, cy_en_clkhf_in_sources_t source)

Selects the source of the selected clkHf.

note

Call SystemCoreClockUpdate after this function calling if it affects the CLK_HF0 frequency.

note

Call Cy_SysLib_SetWaitStates before calling this function if CLK_HF0 frequency is increasing.

note

Call Cy_SysLib_SetWaitStates after calling this function if CLK_HF0 frequency is decreasing.

Return

cy_en_sysclk_status_t CY_SYSCLK_INVALID_STATE - ECO already enabled For the PSoC 64 devices there are possible situations when function returns the PRA error status code. This is because for PSoC 64 devices the function uses the PRA driver to change the protected registers. Refer to cy_en_pra_status_t for more details.

Function Usage

    /* Scenario: HFCLK1 source may have been updated to Path 0 somewhere in the
                 application. Check if it was and change the source to Path 1. */

    if(CY_SYSCLK_CLKHF_IN_CLKPATH0 == Cy_SysClk_ClkHfGetSource(1UL))
    {
        /* Set the HFCLK1 source to Path 1 clock */
        (void)Cy_SysClk_ClkHfDisable(1UL);
        (void)Cy_SysClk_ClkHfSetSource(1UL, CY_SYSCLK_CLKHF_IN_CLKPATH1);
        (void)Cy_SysClk_ClkHfEnable(1UL);
    }

Parameters

cy_en_clkhf_in_sources_t Cy_SysClk_ClkHfGetSource(uint32_t clkHf)

Reports the source of the selected clkHf.

Return

cy_en_clkhf_in_sources_t

Function Usage

    /* Scenario: HFCLK1 source may have been updated to Path 0 somewhere in the
                 application. Check if it was and change the source to Path 1. */

    if(CY_SYSCLK_CLKHF_IN_CLKPATH0 == Cy_SysClk_ClkHfGetSource(1UL))
    {
        /* Set the HFCLK1 source to Path 1 clock */
        (void)Cy_SysClk_ClkHfDisable(1UL);
        (void)Cy_SysClk_ClkHfSetSource(1UL, CY_SYSCLK_CLKHF_IN_CLKPATH1);
        (void)Cy_SysClk_ClkHfEnable(1UL);
    }

Parameters
  • clkHf: selects which clkHf to get the source of.

cy_en_sysclk_status_t Cy_SysClk_ClkHfSetDivider(uint32_t clkHf, cy_en_clkhf_dividers_t divider)

Sets the pre-divider for a clkHf.

note

Also call Cy_SysClk_ClkHfSetSource to set the clkHf source.

note

Call SystemCoreClockUpdate after this function calling if it affects the CLK_HF0 frequency.

note

Call Cy_SysLib_SetWaitStates before calling this function if CLK_HF0 frequency is increasing.

note

Call Cy_SysLib_SetWaitStates after calling this function if CLK_HF0 frequency is decreasing.

Return

cy_en_sysclk_status_t CY_SYSCLK_INVALID_STATE - ECO already enabled For the PSoC 64 devices there are possible situations when function returns the PRA error status code. This is because for PSoC 64 devices the function uses the PRA driver to change the protected registers. Refer to cy_en_pra_status_t for more details.

Function Usage

    /* Scenario: Set HFCLK0 divider to 8, to reduce frequency and save power */

    if(CY_SYSCLK_CLKHF_DIVIDE_BY_8 != Cy_SysClk_ClkHfGetDivider(0UL))
    {
        /* Set the HFCLK0 divider to 8 */
        (void)Cy_SysClk_ClkHfSetDivider(0UL, CY_SYSCLK_CLKHF_DIVIDE_BY_8);
    }

    /* Check the HFCLK0 frequency */
    uint32_t clkHf0freq = Cy_SysClk_ClkHfGetFrequency(0UL);

Parameters

cy_en_clkhf_dividers_t Cy_SysClk_ClkHfGetDivider(uint32_t clkHf)

Reports the pre-divider value for a clkHf.

Return

cy_en_clkhf_dividers_t

Function Usage

    /* Scenario: Set HFCLK0 divider to 8, to reduce frequency and save power */

    if(CY_SYSCLK_CLKHF_DIVIDE_BY_8 != Cy_SysClk_ClkHfGetDivider(0UL))
    {
        /* Set the HFCLK0 divider to 8 */
        (void)Cy_SysClk_ClkHfSetDivider(0UL, CY_SYSCLK_CLKHF_DIVIDE_BY_8);
    }

    /* Check the HFCLK0 frequency */
    uint32_t clkHf0freq = Cy_SysClk_ClkHfGetFrequency(0UL);

Parameters
  • clkHf: selects which clkHf to check divider of.

uint32_t Cy_SysClk_ClkHfGetFrequency(uint32_t clkHf)

Reports the frequency of the selected clkHf.

note

The reported frequency may be zero, which indicates unknown. This happens if the source input is dsi_out or clk_altlf.

Return

The frequency, in Hz.

Function Usage

    /* Scenario: Set HFCLK0 divider to 8, to reduce frequency and save power */

    if(CY_SYSCLK_CLKHF_DIVIDE_BY_8 != Cy_SysClk_ClkHfGetDivider(0UL))
    {
        /* Set the HFCLK0 divider to 8 */
        (void)Cy_SysClk_ClkHfSetDivider(0UL, CY_SYSCLK_CLKHF_DIVIDE_BY_8);
    }

    /* Check the HFCLK0 frequency */
    uint32_t clkHf0freq = Cy_SysClk_ClkHfGetFrequency(0UL);

Parameters
  • clkHf: Selects the clkHf