External Clock Source (EXTCLK)

group group_sysclk_ext

The External Clock Source (EXTCLK) is a clock source routed into PSoC through a GPIO pin.

The EXTCLK is a source clock that can be used to source one or more clock paths (Refer to Clock Path Source). These clock paths can then source the processors and peripherals in the device.

The EXTCLK relies on the presence of an external clock signal applied to the GPIO pin. The pin must be configured to operate in Digital High-Z drive mode with input buffer on and HSIOM connection set to HSIOM_SEL_ACT_4 (P0_0_SRSS_EXT_CLK, P0_5_SRSS_EXT_CLK).

API Reference