Medium Frequency Domain Clock

group group_sysclk_mf_funcs

The Medium Frequency Domain Clock is present only in SRSS_ver1_3.

Consists of MFO - the Medium Frequency Oscillator, and CLK_MF - the Medium Frequency Clock divider. This clock chain is designed to source the LCD block in Deep Sleep mode, see cy_en_seglcd_lsclk_t.

Functions

void Cy_SysClk_MfoEnable(bool deepSleepEnable)

Enables the MFO.

Function Usage

    /* Scenario: MFO is needed to source LCD with 1MHz in Deep Sleep mode. */

    Cy_SysClk_MfoEnable(true); /* Enable MFO with Deep Sleep operation */

    if (Cy_SysClk_ClkMfIsEnabled()) /* If CLK_MF is already enabled */
    {
        Cy_SysClk_ClkMfDisable();   /* Disable CLK_MF */
    }

    if (2UL != Cy_SysClk_ClkMfGetDivider()) /* Check the divider */
    {
        Cy_SysClk_ClkMfSetDivider(2UL); /* Set CLK_MF divider */
    }

    Cy_SysClk_ClkMfEnable();        /* Enable CLK_MF */

    /* Check the CLK_MF frequency */
    uint32_t clkMfreq = Cy_SysClk_ClkMfGetFrequency();

Parameters

• deepSleepEnable: enables MFO operation is Deep Sleep low power mode.

bool Cy_SysClk_MfoIsEnabled(void)

Reports whether MFO is enabled or not.

Return

false - disabled

true - enabled

Function Usage

    /* Scenario: MFO is not more needed so could be disabled. */

    Cy_SysClk_ClkMfDisable(); /* Disable CLK_MF */

    if (Cy_SysClk_MfoIsEnabled()) /* If MFO enabled */
    {
        Cy_SysClk_MfoDisable(); /* Disable MF0 */
    }

void Cy_SysClk_MfoDisable(void)

Disables the MFO.

Function Usage

    /* Scenario: MFO is not more needed so could be disabled. */

    Cy_SysClk_ClkMfDisable(); /* Disable CLK_MF */

    if (Cy_SysClk_MfoIsEnabled()) /* If MFO enabled */
    {
        Cy_SysClk_MfoDisable(); /* Disable MF0 */
    }

void Cy_SysClk_ClkMfEnable(void)

Enables the CLK_MF.

Function Usage

    /* Scenario: MFO is needed to source LCD with 1MHz in Deep Sleep mode. */

    Cy_SysClk_MfoEnable(true); /* Enable MFO with Deep Sleep operation */

    if (Cy_SysClk_ClkMfIsEnabled()) /* If CLK_MF is already enabled */
    {
        Cy_SysClk_ClkMfDisable();   /* Disable CLK_MF */
    }

    if (2UL != Cy_SysClk_ClkMfGetDivider()) /* Check the divider */
    {
        Cy_SysClk_ClkMfSetDivider(2UL); /* Set CLK_MF divider */
    }

    Cy_SysClk_ClkMfEnable();        /* Enable CLK_MF */

    /* Check the CLK_MF frequency */
    uint32_t clkMfreq = Cy_SysClk_ClkMfGetFrequency();

bool Cy_SysClk_ClkMfIsEnabled(void)

Reports whether CLK_MF is enabled or not.

Return

false - disabled

true - enabled

Function Usage

    /* Scenario: MFO is needed to source LCD with 1MHz in Deep Sleep mode. */

    Cy_SysClk_MfoEnable(true); /* Enable MFO with Deep Sleep operation */

    if (Cy_SysClk_ClkMfIsEnabled()) /* If CLK_MF is already enabled */
    {
        Cy_SysClk_ClkMfDisable();   /* Disable CLK_MF */
    }

    if (2UL != Cy_SysClk_ClkMfGetDivider()) /* Check the divider */
    {
        Cy_SysClk_ClkMfSetDivider(2UL); /* Set CLK_MF divider */
    }

    Cy_SysClk_ClkMfEnable();        /* Enable CLK_MF */

    /* Check the CLK_MF frequency */
    uint32_t clkMfreq = Cy_SysClk_ClkMfGetFrequency();

void Cy_SysClk_ClkMfDisable(void)

Disables the CLK_MF.

Function Usage

    /* Scenario: MFO is not more needed so could be disabled. */

    Cy_SysClk_ClkMfDisable(); /* Disable CLK_MF */

    if (Cy_SysClk_MfoIsEnabled()) /* If MFO enabled */
    {
        Cy_SysClk_MfoDisable(); /* Disable MF0 */
    }

void Cy_SysClk_ClkMfSetDivider(uint32_t divider)

Sets the clock divider for CLK_MF.

Precondition

If the CLK_MF is already enabled - it should be disabled prior to use this function by Cy_SysClk_ClkMfDisable.

Function Usage

    /* Scenario: MFO is needed to source LCD with 1MHz in Deep Sleep mode. */

    Cy_SysClk_MfoEnable(true); /* Enable MFO with Deep Sleep operation */

    if (Cy_SysClk_ClkMfIsEnabled()) /* If CLK_MF is already enabled */
    {
        Cy_SysClk_ClkMfDisable();   /* Disable CLK_MF */
    }

    if (2UL != Cy_SysClk_ClkMfGetDivider()) /* Check the divider */
    {
        Cy_SysClk_ClkMfSetDivider(2UL); /* Set CLK_MF divider */
    }

    Cy_SysClk_ClkMfEnable();        /* Enable CLK_MF */

    /* Check the CLK_MF frequency */
    uint32_t clkMfreq = Cy_SysClk_ClkMfGetFrequency();

Parameters

• divider: divider value between 1 and 256.

uint32_t Cy_SysClk_ClkMfGetDivider(void)

Returns the clock divider of CLK_MF.

Return

divider value in range 1..256.

Function Usage

    /* Scenario: MFO is needed to source LCD with 1MHz in Deep Sleep mode. */

    Cy_SysClk_MfoEnable(true); /* Enable MFO with Deep Sleep operation */

    if (Cy_SysClk_ClkMfIsEnabled()) /* If CLK_MF is already enabled */
    {
        Cy_SysClk_ClkMfDisable();   /* Disable CLK_MF */
    }

    if (2UL != Cy_SysClk_ClkMfGetDivider()) /* Check the divider */
    {
        Cy_SysClk_ClkMfSetDivider(2UL); /* Set CLK_MF divider */
    }

    Cy_SysClk_ClkMfEnable();        /* Enable CLK_MF */

    /* Check the CLK_MF frequency */
    uint32_t clkMfreq = Cy_SysClk_ClkMfGetFrequency();

uint32_t Cy_SysClk_ClkMfGetFrequency(void)

Reports the output clock signal frequency of CLK_MF.

Return

The frequency, in Hz.

Function Usage

    /* Scenario: MFO is needed to source LCD with 1MHz in Deep Sleep mode. */

    Cy_SysClk_MfoEnable(true); /* Enable MFO with Deep Sleep operation */

    if (Cy_SysClk_ClkMfIsEnabled()) /* If CLK_MF is already enabled */
    {
        Cy_SysClk_ClkMfDisable();   /* Disable CLK_MF */
    }

    if (2UL != Cy_SysClk_ClkMfGetDivider()) /* Check the divider */
    {
        Cy_SysClk_ClkMfSetDivider(2UL); /* Set CLK_MF divider */
    }

    Cy_SysClk_ClkMfEnable();        /* Enable CLK_MF */

    /* Check the CLK_MF frequency */
    uint32_t clkMfreq = Cy_SysClk_ClkMfGetFrequency();