Reset cause

group group_syslib_macros_reset_cause

Define RESET_CAUSE mask values.

Defines

CY_SYSLIB_RESET_HWWDT

A basic WatchDog Timer (WDT) reset has occurred since the last power cycle.

CY_SYSLIB_RESET_ACT_FAULT

The fault logging system requested a reset from its Active logic.

CY_SYSLIB_RESET_DPSLP_FAULT

The fault logging system requested a reset from its Deep-Sleep logic.

CY_SYSLIB_RESET_SOFT

The CPU requested a system reset through it’s SYSRESETREQ.

This can be done via a debugger probe or in firmware.

CY_SYSLIB_RESET_SWWDT0

The Multi-Counter Watchdog timer #0 reset has occurred since the last power cycle.

CY_SYSLIB_RESET_SWWDT1

The Multi-Counter Watchdog timer #1 reset has occurred since the last power cycle.

CY_SYSLIB_RESET_SWWDT2

The Multi-Counter Watchdog timer #2 reset has occurred since the last power cycle.

CY_SYSLIB_RESET_SWWDT3

The Multi-Counter Watchdog timer #3 reset has occurred since the last power cycle.

CY_SYSLIB_RESET_CSV_LOSS_WAKEUP

The reset has occured on a loss of high-frequency clock.

CY_SYSLIB_RESET_CSV_ERROR_WAKEUP

The reset has occured due to frequency error of high-frequency clock.

CY_SYSLIB_RESET_HIB_WAKEUP

The reset has occurred on a wakeup from Hibernate power mode.