Introducing MTB CAT1A

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PSoC 6 is Cypress’ new PSoC MCU architecture, purpose-built for the IoT. It bridges the gap between expensive, power hungry application processors and low performance MCUs. The ultra-low-power PSoC 6 MCU architecture offers the processing performance needed by IoT devices, eliminating the tradeoffs between power and performance.

PSoC 6 MCU is a dual core architecture, with both microcontrollers on a single chip. It has an ARM® Cortex®-M4 for high-performance tasks, and an ARM® Cortex®-M0+ for low-power tasks. Security is built-in, protecting your IoT system.

The PSoC 6 MCU architecture enables engineers to create innovative, next-generation IoT devices that take advantage of the merits of each core. Using the highly-customizable Peripheral Driver Library (PDL), you write code for either processor using a single API. In addition, the two cores share a common memory space. Inter-processor communication is simplified, both by this design, and the PDL IPC driver.

The PDL provides fully-integrated support for BLE, an RTOS, a trusted execution environment, capacitive sensing, and a great deal more. In addition to the integrated peripherals, developers can leverage the unique PSoC fabric with its easy-to-use, custom, software-defined peripherals.

The combination of highly-capable MCUs with an extremely flexible driver API, extensive integrated middleware, and custom software-based peripherals, enables significant opportunity for developers to create better solutions.

Extended battery life:

  • Built on an ultra-low-power 40-nm process technology

  • Active power consumption as low as 22-uA/MHz for the Cortex-M4 core

  • Dual-core ARM Cortex-M architecture, optimizing for power and performance

  • Integrated high efficiency Buck converter and LDO regulator

  • Dynamic voltage and frequency scaling (DVFS with PLL/FLL)

Enabling innovation:

  • Best-in-class flexibility, with multiple connectivity options, such as BLE with 2 Mbps throughput and USB

  • Fully-customizable hardware peripherals with a driver library provided as source code

  • Software-defined peripherals to create custom analog and digital circuits within the PSoC MCU

  • Industry leading capacitive-sensing, CapSense™

  • XIP Quad-SPI supports on-the-fly encryption

Protection against cyber threats:

  • Integrated, hardware-based Trusted Execution Environment (TEE) with secure data storage

  • Dedicated security coprocessor, which eliminates the need for external SoCs or memories

  • Secure Boot capability

  • Advanced cryptographic accelerator block supports ECC, AES128, SHA1/2/3